+
+// TX IO Pins
+#define HB_PA_OFF (1 << 15) // 5GHz PA, 1 = off, 0 = on
+#define LB_PA_OFF (1 << 14) // 2.4GHz PA, 1 = off, 0 = on
+#define ANTSEL_TX1_RX2 (1 << 13) // 1 = Ant 1 to TX, Ant 2 to RX
+#define ANTSEL_TX2_RX1 (1 << 12) // 1 = Ant 2 to TX, Ant 1 to RX
+#define TX_EN (1 << 11) // 1 = TX on, 0 = TX off
+#define AD9515DIV (1 << 4) // 1 = Div by 3, 0 = Div by 2
+
+#define TX_OE_MASK HB_PA_OFF|LB_PA_OFF|ANTSEL_TX1_RX2|ANTSEL_TX2_RX1|TX_EN|AD9515DIV
+#define TX_SAFE_IO HB_PA_OFF|LB_PA_OFF|ANTSEL_TX1_RX2|AD9515DIV
+
+// RX IO Pins
+#define LOCKDET (1 << 15) // This is an INPUT!!!
+#define EN (1 << 14)
+#define RX_EN (1 << 13) // 1 = RX on, 0 = RX off
+#define RX_HP (1 << 12)
+#define RX_OE_MASK EN|RX_EN|RX_HP
+#define RX_SAFE_IO EN
+
+struct xcvr2450_key {
+ std::string serial_no;
+ int which;
+
+ bool operator==(const xcvr2450_key &x){
+ return x.serial_no ==serial_no && x.which == which;
+ }
+};
+
+class xcvr2450
+{
+private:
+ usrp_basic *d_raw_usrp;
+ int d_which;
+
+ bool d_is_shutdown;
+ int d_spi_format, d_spi_enable;
+
+ int d_mimo, d_int_div, d_frac_div, d_highband, d_five_gig;
+ int d_cp_current, d_ref_div, d_rssi_hbw;
+ int d_txlpf_bw, d_rxlpf_bw, d_rxlpf_fine, d_rxvga_ser;
+ int d_rssi_range, d_rssi_mode, d_rssi_mux;
+ int d_rx_hp_pin, d_rx_hpf, d_rx_ant;
+ int d_tx_ant, d_txvga_ser, d_tx_driver_lin;
+ int d_tx_vga_lin, d_tx_upconv_lin, d_tx_bb_gain;
+ int d_pabias_delay, d_pabias, rx_rf_gain, rx_bb_gain, d_txgain;
+ int d_rx_rf_gain, d_rx_bb_gain;
+
+ int d_reg_standby, d_reg_int_divider, d_reg_frac_divider, d_reg_bandselpll;
+ int d_reg_cal, dsend_reg, d_reg_lpf, d_reg_rxrssi_ctrl, d_reg_txlin_gain;
+ int d_reg_pabias, d_reg_rxgain, d_reg_txgain;
+
+ int d_ad9515_div;
+
+ void _set_rfagc(float gain);
+ void _set_ifagc(float gain);
+ void _set_pga(float pga_gain);
+
+public:
+ usrp_basic *usrp(){
+ return d_raw_usrp;
+ }
+
+ xcvr2450(usrp_basic_sptr usrp, int which);
+ ~xcvr2450();
+ void shutdown();
+
+ void set_reg_standby();
+
+ // Integer-Divider Ratio (3)
+ void set_reg_int_divider();
+
+ // Fractional-Divider Ratio (4)
+ void set_reg_frac_divider();
+
+ // Band Select and PLL (5)
+ void set_reg_bandselpll();
+
+ // Calibration (6)
+ void set_reg_cal();
+
+ // Lowpass Filter (7)
+ void set_reg_lpf();
+
+ // Rx Control/RSSI (8)
+ void set_reg_rxrssi_ctrl();
+
+ // Tx Linearity/Baseband Gain (9)
+ void set_reg_txlin_gain();
+
+ // PA Bias DAC (10)
+ void set_reg_pabias();
+
+ // Rx Gain (11)
+ void set_reg_rxgain();
+
+ // Tx Gain (12)
+ void set_reg_txgain();
+
+ // Send register write to SPI
+ void send_reg(int v);
+
+ void set_gpio();
+ bool lock_detect();
+ bool set_rx_gain(float gain);
+ bool set_tx_gain(float gain);
+
+ struct freq_result_t set_freq(double target_freq);
+};
+
+