+C 75900 49200 1 0 0 hole_plated.sym
+{
+T 76000 51000 5 10 0 0 0 0 1
+device=HOLE_PLATED
+T 75500 49400 5 10 1 1 0 0 1
+refdes=H3
+T 75900 49200 5 10 0 0 0 0 1
+footprint=hole-M3
+}
+C 75900 48200 1 0 0 hole_plated.sym
+{
+T 76000 50000 5 10 0 0 0 0 1
+device=HOLE_PLATED
+T 75500 48400 5 10 1 1 0 0 1
+refdes=H4
+T 75900 48200 5 10 0 0 0 0 1
+footprint=hole-M3
+}
+N 76500 49400 77100 49400 4
+N 76500 48400 77100 48400 4
+C 54300 50600 1 0 0 conn-6.sym
+{
+T 54655 52895 5 10 1 1 0 0 1
+refdes=J4
+T 54300 50600 5 10 0 0 0 0 1
+footprint=282834-6
+T 54300 50600 5 10 0 0 0 0 1
+digikey=A98337-ND
+}
+N 48500 50900 49500 50900 4
+N 53200 51900 54300 51900 4
+{
+T 53200 52000 5 10 1 1 0 0 1
+netname=fet_m
+}
+N 47700 50500 49500 50500 4
+{
+T 47900 50600 5 10 1 1 0 0 1
+netname=fet_m
+}
+N 53200 51500 54300 51500 4
+{
+T 53200 51600 5 10 1 1 0 0 1
+netname=v_eject
+}
+N 54300 51100 53200 51100 4
+{
+T 53200 51200 5 10 1 1 0 0 1
+netname=v_lipo
+}
+N 54300 50700 53200 50700 4
+{
+T 53200 50800 5 10 1 1 0 0 1
+netname=v_charge
+}
+N 64200 65900 66200 65900 4
+{
+T 64800 66000 5 10 1 1 0 0 1
+netname=v_charge
+}
+C 49500 52200 1 0 0 conn-2.sym
+{
+T 49805 52845 5 10 1 1 0 0 1
+refdes=J1
+T 49500 52200 5 10 0 0 0 0 1
+footprint=530470210
+T 49500 52200 5 10 0 0 0 0 1
+digikey=WM1731-ND
+}
+N 54300 52300 54200 52300 4
+N 54200 52300 54200 51500 4
+N 54300 52700 53200 52700 4
+{
+T 53200 52800 5 10 1 1 0 0 1
+netname=fet_d
+}
+C 49500 50400 1 0 0 conn-2.sym
+{
+T 49805 51045 5 10 1 1 0 0 1
+refdes=J2
+T 49500 50400 5 10 0 0 0 0 1
+footprint=530470210
+T 49500 50400 5 10 0 0 0 0 1
+digikey=WM1731-ND
+}
+C 66700 65900 1 90 0 conn-2.sym
+{
+T 66495 66855 5 10 1 1 180 0 1
+refdes=J3
+T 66700 65900 5 10 0 0 90 0 1
+footprint=530470210
+T 66700 65900 5 10 0 0 90 0 1
+digikey=WM1731-ND
+}
+C 68500 50400 1 0 0 gnd-1.sym
+N 64300 65400 64300 65500 4
+N 64300 65500 64200 65500 4
+N 64300 64500 64300 64400 4
+N 64300 64400 64900 64400 4
+N 64900 64400 64900 64700 4
+N 64900 65100 64900 65900 4
+C 70600 52300 1 0 0 ABM8.sym
+{
+T 70800 52800 5 10 0 0 0 0 1
+device=CRYSTAL
+T 70500 52900 5 10 1 1 0 0 1
+refdes=X1
+T 70800 53000 5 10 0 0 0 0 1
+symversion=0.1
+T 70900 52900 5 10 1 1 0 0 1
+value=48mhz
+T 70600 52300 5 10 0 0 0 0 1
+digikey=535-9149-1-ND
+T 70600 52300 5 10 0 0 0 0 1
+footprint=ABM8
+}
+C 71200 52000 1 0 0 gnd-1.sym
+C 70500 52000 1 0 0 gnd-1.sym
+N 62900 50800 62800 50800 4
+N 62800 49200 62800 50800 4
+N 62200 49600 62200 49800 4
+C 62000 50700 1 0 0 3.3V-plus-1.sym
+C 62300 49800 1 90 0 resistor.sym
+{
+T 61900 50100 5 10 0 0 90 0 1
+device=RESISTOR
+T 62000 50500 5 10 1 1 180 0 1
+refdes=R18
+T 62300 49795 5 10 0 1 90 0 1
+footprint=0402
+T 61700 50000 5 10 1 1 0 0 1
+value=10k
+T 62300 49800 5 10 0 1 0 0 1
+digikey=RMCF1/16S10K1%RCT-ND
+}
+T 61900 46700 9 10 1 0 0 0 4
+R18 shouldn't be necessary, but experience with
+a CP2103 GPIO interface to the debug port suggests
+we may need a stiff pullup. Consider 10k a placeholder
+for experimentation once we have real boards in hand.
+N 42400 69100 43700 69100 4
+{
+T 42400 69200 5 10 1 1 0 0 1
+netname=v_lipo
+}