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target/riscv-013: fix unused initialization
[fw/openocd]
/
tcl
/
target
/
stm32wlx.cfg
diff --git
a/tcl/target/stm32wlx.cfg
b/tcl/target/stm32wlx.cfg
index fafe9bcbacdc8a15b7a163974c270fe17f23e9c5..39c897fc5d2cf80828637901eef1bf1589bba36a 100644
(file)
--- a/
tcl/target/stm32wlx.cfg
+++ b/
tcl/target/stm32wlx.cfg
@@
-1,3
+1,5
@@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32wlx family
#
# script for stm32wlx family
#
@@
-117,9
+119,7
@@
$_CHIPNAME.cpu0 configure -event examine-end {
}
}
}
}
-$_CHIPNAME.cpu0 configure -event trace-config {
- # nothing to do
-}
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
if {[set $_CHIPNAME.DUAL_CORE]} {
target create $_CHIPNAME.cpu1 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
if {[set $_CHIPNAME.DUAL_CORE]} {
target create $_CHIPNAME.cpu1 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
@@
-156,9
+156,7
@@
proc stm32wlx_get_chipname {} {
# like mrw, but with target selection
proc stm32wlx_mrw {used_target reg} {
# like mrw, but with target selection
proc stm32wlx_mrw {used_target reg} {
- set value ""
- $used_target mem2array value 32 $reg 1
- return $value(0)
+ return [$used_target read_memory $reg 32 1]
}
# like mmw, but with target selection
}
# like mmw, but with target selection