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cfg: Add new BSTAPID for STM32F42xxx and STM32F43xxx series
[fw/openocd]
/
tcl
/
target
/
stm32f4x.cfg
diff --git
a/tcl/target/stm32f4x.cfg
b/tcl/target/stm32f4x.cfg
index 374c3371699f79f418fcfea66a27be9fbbcf75bd..b5ab200481b0543c3a5cace4a6bb55cec65cc544 100644
(file)
--- a/
tcl/target/stm32f4x.cfg
+++ b/
tcl/target/stm32f4x.cfg
@@
-36,7
+36,7
@@
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0090
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0090
- # Section 3
2.6.2
- corresponds to Cortex-M4 r0p1
+ # Section 3
8.6.3
- corresponds to Cortex-M4 r0p1
set _CPUTAPID 0x4ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _CPUTAPID 0x4ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
@@
-45,10
+45,14
@@
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
# See STM Document RM0090
set _BSTAPID $BSTAPID
} else {
# See STM Document RM0090
- # Section 32.6.3
- set _BSTAPID 0x06413041
+ # Section 38.6.2
+ # STM32F405xx/07xx and STM32F415xx/17xx
+ set _BSTAPID1 0x06413041
+ # STM32F42xxx and STM32F43xxx
+ set _BSTAPID2 0x06419041
}
}
-jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+ -expected-id $_BSTAPID2
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME