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tcl/target/ti_k3: Rename m4 target as general purpose mcu
[fw/openocd]
/
tcl
/
target
/
nrf51.cfg
diff --git
a/tcl/target/nrf51.cfg
b/tcl/target/nrf51.cfg
index 129060d356105dd32856eeb764901d4effdc0db8..d51a50e23152bdb352136fa13a87b19482c220a2 100644
(file)
--- a/
tcl/target/nrf51.cfg
+++ b/
tcl/target/nrf51.cfg
@@
-1,5
+1,5
@@
#
#
-# script for Nordic nRF51 series, a C
ORTEX
-M0 chip
+# script for Nordic nRF51 series, a C
ortex
-M0 chip
#
source [find target/swj-dp.tcl]
#
source [find target/swj-dp.tcl]
@@
-17,11
+17,11
@@
if { [info exists ENDIAN] } {
}
# Work-area is a space in RAM used for flash programming
}
# Work-area is a space in RAM used for flash programming
-# By default use
2
kB
+# By default use
16
kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
- set _WORKAREASIZE 0x
8
00
+ set _WORKAREASIZE 0x
40
00
}
if { [info exists CPUTAPID] } {
}
if { [info exists CPUTAPID] } {
@@
-31,9
+31,10
@@
if { [info exists CPUTAPID] } {
}
swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
}
swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -
chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -
dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
@@
-49,7
+50,7
@@
flash bank $_CHIPNAME.uicr nrf51 0x10001000 0 1 1 $_TARGETNAME
# The chip should start up from internal 16Mhz RC, so setting adapter
# clock to 1Mhz should be OK
#
# The chip should start up from internal 16Mhz RC, so setting adapter
# clock to 1Mhz should be OK
#
-adapter
_khz
1000
+adapter
speed
1000
proc enable_all_ram {} {
# nRF51822 Product Anomaly Notice (PAN) #16 explains that not all RAM banks
proc enable_all_ram {} {
# nRF51822 Product Anomaly Notice (PAN) #16 explains that not all RAM banks