-#delays on reset lines
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
-
-# LPC2000 -> SRST causes TRST
-reset_config trst_and_srst srst_pulls_trst
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
-
-# LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
-$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
-
-$_TARGETNAME configure -event reset-init {
- # Force target into ARM state
- arm core_state arm
- # Do not remap 0x0000-0x0020 to anything but the Flash
- mwb 0xE01FC040 0x01
+proc init_targets {} {
+ # default to core clocked with 4MHz internal oscillator
+ echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different."
+
+ # setup_lpc2478 <core_freq_khz> <adapter_freq_khz>
+ setup_lpc2478 4000 500