-# Main file for NXP LPC17xx Cortex-M3
-#
-# !!!!!!
-#
-# This file should not be included directly, rather
-# by the lpc1751.cfg, lpc1752.cfg, etc. which set the
-# needed variables to the appropriate values.
-#
-# !!!!!!
-
-# LPC17xx chips support both JTAG and SWD transports.
-# Adapt based on what transport is active.
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- error "_CHIPNAME not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
-}
-
-# After reset the chip is clocked by the ~4MHz internal RC oscillator.
-# When board-specific code (reset-init handler or device firmware)
-# configures another oscillator and/or PLL0, set CCLK to match; if
-# you don't, then flash erase and write operations may misbehave.
-# (The ROM code doing those updates cares about core clock speed...)
-#
-# CCLK is the core clock frequency in KHz
-if { [info exists CCLK] } {
- set _CCLK $CCLK
-} else {
- set _CCLK 4000
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- error "_CPUTAPID not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
-}
-
-if { [info exists CPURAMSIZE] } {
- set _CPURAMSIZE $CPURAMSIZE
-} else {
- error "_CPURAMSIZE not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
-}
-
-if { [info exists CPUROMSIZE] } {
- set _CPUROMSIZE $CPUROMSIZE
-} else {
- error "_CPUROMSIZE not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."