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tcl/target: add SPDX tag
[fw/openocd]
/
tcl
/
target
/
imx53.cfg
diff --git
a/tcl/target/imx53.cfg
b/tcl/target/imx53.cfg
index 87a3008e4de0c5bd94a45c9f276177361fcc16d5..855a6aeaabaed5b1e5c88b94679b00ae646ca2e7 100644
(file)
--- a/
tcl/target/imx53.cfg
+++ b/
tcl/target/imx53.cfg
@@
-1,3
+1,5
@@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Freescale i.MX53
if { [info exists CHIPNAME] } {
# Freescale i.MX53
if { [info exists CHIPNAME] } {
@@
-13,11
+15,11
@@
if { [info exists DAP_TAPID] } {
set _DAP_TAPID 0x1ba00477
}
set _DAP_TAPID 0x1ba00477
}
-jtag newtap $_CHIPNAME
DAP
-irlen 4 -ircapture 0x1 -irmask 0xf \
+jtag newtap $_CHIPNAME
cpu
-irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_DAP_TAPID
# SDMA / no IDCODE
-expected-id $_DAP_TAPID
# SDMA / no IDCODE
-jtag newtap $_CHIPNAME
SDMA
-irlen 4 -ircapture 0x0 -irmask 0xf
+jtag newtap $_CHIPNAME
sdma
-irlen 4 -ircapture 0x0 -irmask 0xf
# SJC
if { [info exists SJC_TAPID] } {
# SJC
if { [info exists SJC_TAPID] } {
@@
-26,18
+28,16
@@
if { [info exists SJC_TAPID] } {
set _SJC_TAPID 0x0190d01d
}
set _SJC_TAPID 0x0190d01d
}
-jtag newtap $_CHIPNAME
SJC
-irlen 5 -ircapture 0x1 -irmask 0x1f \
+jtag newtap $_CHIPNAME
sjc
-irlen 5 -ircapture 0x1 -irmask 0x1f \
-expected-id $_SJC_TAPID -ignore-version
# GDB target: Cortex-A8, using DAP
set _TARGETNAME $_CHIPNAME.cpu
-expected-id $_SJC_TAPID -ignore-version
# GDB target: Cortex-A8, using DAP
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.DAP
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap
# some TCK tycles are required to activate the DEBUG power domain
# some TCK tycles are required to activate the DEBUG power domain
-jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100"
-
-# have the DAP "always" be active
-jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP"
+jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
proc imx53_dbginit {target} {
# General Cortex-A8 debug initialisation
proc imx53_dbginit {target} {
# General Cortex-A8 debug initialisation