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board: Add the HiFive1 revB board configuration
[fw/openocd]
/
tcl
/
target
/
icepick.cfg
diff --git
a/tcl/target/icepick.cfg
b/tcl/target/icepick.cfg
index 0f160bb1073c2342391c3ba5cd9c373b8ad83730..36b0b7033b88ba333d75744546179b9eb245c00b 100644
(file)
--- a/
tcl/target/icepick.cfg
+++ b/
tcl/target/icepick.cfg
@@
-90,18
+90,18
@@
proc icepick_c_tapenable {jrc port} {
# And never to enter RESET, which will disable the TAPs.
# first enable power and clock for TAP
# And never to enter RESET, which will disable the TAPs.
# first enable power and clock for TAP
- icepick_c_router $jrc 1 0x2 $port 0x1
0
0048
+ icepick_c_router $jrc 1 0x2 $port 0x1
1
0048
# TRM states that the register should be read back here, skipped for now
# enable debug "default" mode
# TRM states that the register should be read back here, skipped for now
# enable debug "default" mode
- icepick_c_router $jrc 1 0x2 $port 0x1
0
2048
+ icepick_c_router $jrc 1 0x2 $port 0x1
1
2048
# TRM states that debug enable and debug mode should be read back and
# confirmed - skipped for now
# Finally select the tap
# TRM states that debug enable and debug mode should be read back and
# confirmed - skipped for now
# Finally select the tap
- icepick_c_router $jrc 1 0x2 $port 0x1
0
2148
+ icepick_c_router $jrc 1 0x2 $port 0x1
1
2148
# Enter the bypass state
irscan $jrc [CONST IR_BYPASS] -endstate RUN/IDLE
# Enter the bypass state
irscan $jrc [CONST IR_BYPASS] -endstate RUN/IDLE
@@
-140,4
+140,3
@@
proc icepick_c_wreset {jrc} {
# send a router write, block is 0, register is 1, value is 0x2100
icepick_c_router $jrc 1 0x0 0x1 0x002101
}
# send a router write, block is 0, register is 1, value is 0x2100
icepick_c_router $jrc 1 0x0 0x1 0x002101
}
-