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tcl/target: add SPDX tag
[fw/openocd]
/
tcl
/
target
/
fm3.cfg
diff --git
a/tcl/target/fm3.cfg
b/tcl/target/fm3.cfg
index e2d78d1e5563b84e4090c54b7f87daa8864c2e0a..0caf629da4a061e39c8d21d5d28c6cb3a0ab937d 100644
(file)
--- a/
tcl/target/fm3.cfg
+++ b/
tcl/target/fm3.cfg
@@
-1,3
+1,5
@@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# MB9BF506
# Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
# MB9BF506
# Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
@@
-22,29
+24,30
@@
if { [info exists CPUTAPID] } {
}
# delays on reset lines
}
# delays on reset lines
-adapter
_nsrst_
delay 100
+adapter
srst
delay 100
if {[using_jtag]} {
jtag_ntrst_delay 100
}
if {[using_jtag]} {
jtag_ntrst_delay 100
}
-# Fujitsu
c
ortex-M3 reset configuration
+# Fujitsu
C
ortex-M3 reset configuration
reset_config trst_only
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
reset_config trst_only
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -
chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -
dap $_CHIPNAME.dap
-# MB9BF506 has 64kB of SRAM on its main system bus
+# MB9BF506 has 64kB of SRAM on its main system bus
$_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0
$_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0
-# MB9BF506 has 512kB internal FLASH
+# MB9BF506 has 512kB internal FLASH
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
# 4MHz / 6 = 666kHz, so use 500
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
# 4MHz / 6 = 666kHz, so use 500
-adapter
_khz
500
+adapter
speed
500
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to