dict set configC100 w_amba 1
dict set configC100 x_amba 1
# y = amba_clk * (w+1)*(x+1)*2/xtal_clk
dict set configC100 w_amba 1
dict set configC100 x_amba 1
# y = amba_clk * (w+1)*(x+1)*2/xtal_clk
# Arm Clk 450MHz, must be a multiple of 25 MHz
dict set configC100 CFG_ARM_CLOCK 450000000
dict set configC100 w_arm 0
dict set configC100 x_arm 1
# y = arm_clk * (w+1)*(x+1)*2/xtal_clk
# Arm Clk 450MHz, must be a multiple of 25 MHz
dict set configC100 CFG_ARM_CLOCK 450000000
dict set configC100 w_arm 0
dict set configC100 x_arm 1
# y = arm_clk * (w+1)*(x+1)*2/xtal_clk
# this is taken from u-boot/boards/mindspeed/ooma-darwin/board.c:nor_hw_init()
set EX_CSEN_REG [regs EX_CSEN_REG ]
set EX_CS0_SEG_REG [regs EX_CS0_SEG_REG ]
# this is taken from u-boot/boards/mindspeed/ooma-darwin/board.c:nor_hw_init()
set EX_CSEN_REG [regs EX_CSEN_REG ]
set EX_CS0_SEG_REG [regs EX_CS0_SEG_REG ]
# This is current setup for Telo (see sch. for details):
#GPIO0 reset for FXS-FXO IC, leave as input, the IC has internal pullup
#GPIO1 irq line for FXS-FXO
# This is current setup for Telo (see sch. for details):
#GPIO0 reset for FXS-FXO IC, leave as input, the IC has internal pullup
#GPIO1 irq line for FXS-FXO
set GPIO_OE_REG [regs GPIO_OE_REG]
# set GPIO29=GPIO17=1, GPIO5=0
set GPIO_OE_REG [regs GPIO_OE_REG]
# set GPIO29=GPIO17=1, GPIO5=0
# show it on serial console
putsUART0 [format "This is %s (0x%x)\n" [dict get [boardID $gpbt] $gpbt name] $gpbt]
# return the ddr2 size, used to configure DDR2 on a given board.
# show it on serial console
putsUART0 [format "This is %s (0x%x)\n" [dict get [boardID $gpbt] $gpbt name] $gpbt]
# return the ddr2 size, used to configure DDR2 on a given board.
- puts -nonewline "Waiting for DDR2 controller to init..."
- set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
- while { [expr $tmp & 0x040000] == 0 } {
+ echo -n "Waiting for DDR2 controller to init..."
+ set tmp [mrw [expr {$DENALI_CTL_08_DATA + 4}]]
+ while { [expr {$tmp & 0x040000}] == 0 } {
# do ddr2 training sequence
# TBD (for now, if you need it, run trainDDR command)
# do ddr2 training sequence
# TBD (for now, if you need it, run trainDDR command)
- puts -nonewline "Waiting for DDR2 controller to init..."
- set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
- while { [expr $tmp & 0x040000] == 0 } {
+ echo -n "Waiting for DDR2 controller to init..."
+ set tmp [mrw [expr {$DENALI_CTL_08_DATA + 4}]]
+ while { [expr {$tmp & 0x040000}] == 0 } {
# do ddr2 training sequence
# TBD (for now, if you need it, run trainDDR command)
# do ddr2 training sequence
# TBD (for now, if you need it, run trainDDR command)
# Enable Divisor Latch access
mmw $UART0_LCR $LCR_DLAB 0x0
# set the divisor to $tmp
# Enable Divisor Latch access
mmw $UART0_LCR $LCR_DLAB 0x0
# set the divisor to $tmp
# convert the 'char' to digit
set tmp [ scan $char %c ]
# /* wait for room in the tx FIFO on FFUART */
# convert the 'char' to digit
set tmp [ scan $char %c ]
# /* wait for room in the tx FIFO on FFUART */
set len [string length $str]
while { $index < $len } {
putcUART0 [string index $str $index]
set len [string length $str]
while { $index < $len } {
putcUART0 [string index $str $index]
putsUART0 "Programming u-boot..."
arm11 memwrite burst enable
flash write_image $file $EXP_CS0_BASEADDR
putsUART0 "Programming u-boot..."
arm11 memwrite burst enable
flash write_image $file $EXP_CS0_BASEADDR