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tcl/target/ti_k3: Rename R5 targets to be more descriptive
[fw/openocd]
/
tcl
/
target
/
altera_fpgasoc.cfg
diff --git
a/tcl/target/altera_fpgasoc.cfg
b/tcl/target/altera_fpgasoc.cfg
index 9c7b4196e34b1dfb68f27012530afa3a6e046a2b..0fc8d6735e0dc1b69b08c099e134e5ce863f6b29 100644
(file)
--- a/
tcl/target/altera_fpgasoc.cfg
+++ b/
tcl/target/altera_fpgasoc.cfg
@@
-14,7
+14,7
@@
if { [info exists DAP_TAPID] } {
set _DAP_TAPID 0x4ba00477
}
set _DAP_TAPID 0x4ba00477
}
-jtag newtap $_CHIPNAME
dap
-irlen 4 -ircapture 0x01 -irmask 0x0f \
+jtag newtap $_CHIPNAME
cpu
-irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
# Subsidiary TAP: fpga
-expected-id $_DAP_TAPID
# Subsidiary TAP: fpga
@@
-27,7
+27,7
@@
jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-
#
#
-# Cortex
A9 target
+# Cortex
-
A9 target
#
# GDB target: Cortex-A9, using DAP, configuring only one core
#
# GDB target: Cortex-A9, using DAP, configuring only one core
@@
-36,29
+36,28
@@
jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-
# core 1 - 0x80112000
# Slow speed to be sure it will work
# core 1 - 0x80112000
# Slow speed to be sure it will work
-
jtag_rclk
1000
+
adapter speed
1000
set _TARGETNAME1 $_CHIPNAME.cpu.0
set _TARGETNAME2 $_CHIPNAME.cpu.1
# A9 core 0
set _TARGETNAME1 $_CHIPNAME.cpu.0
set _TARGETNAME2 $_CHIPNAME.cpu.1
# A9 core 0
-target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap \
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME1 cortex_a -dap $_CHIPNAME.dap \
-coreid 0 -dbgbase 0x80110000
-coreid 0 -dbgbase 0x80110000
-$_TARGETNAME1 configure -event reset-start {
jtag_rclk
1000 }
+$_TARGETNAME1 configure -event reset-start {
adapter speed
1000 }
$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
-$_TARGETNAME1 configure -event gdb-attach { halt }
# A9 core 1
# A9 core 1
-#target create $_TARGETNAME2 cortex_a -
chain-position
$_CHIPNAME.dap \
+#target create $_TARGETNAME2 cortex_a -
dap
$_CHIPNAME.dap \
# -coreid 1 -dbgbase 0x80112000
# -coreid 1 -dbgbase 0x80112000
-#$_TARGETNAME2 configure -event reset-start {
jtag_rclk
1000 }
+#$_TARGETNAME2 configure -event reset-start {
adapter speed
1000 }
#$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
#$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
-#$_TARGETNAME2 configure -event gdb-attach { halt }
proc cycv_dbginit {target} {
proc cycv_dbginit {target} {
- # General Cortex
A8/A9 debug initialisation
- cortex_a
8
dbginit
+ # General Cortex
-
A8/A9 debug initialisation
+ cortex_a dbginit
}
}