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tcl/target/ti_k3: Rename R5 targets to be more descriptive
[fw/openocd]
/
tcl
/
target
/
altera_fpgasoc.cfg
diff --git
a/tcl/target/altera_fpgasoc.cfg
b/tcl/target/altera_fpgasoc.cfg
index 9a83b5ccb0d2c0b19e11c14248345b1698863679..0fc8d6735e0dc1b69b08c099e134e5ce863f6b29 100644
(file)
--- a/
tcl/target/altera_fpgasoc.cfg
+++ b/
tcl/target/altera_fpgasoc.cfg
@@
-36,7
+36,7
@@
jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-
# core 1 - 0x80112000
# Slow speed to be sure it will work
# core 1 - 0x80112000
# Slow speed to be sure it will work
-adapter
_khz
1000
+adapter
speed
1000
set _TARGETNAME1 $_CHIPNAME.cpu.0
set _TARGETNAME2 $_CHIPNAME.cpu.1
set _TARGETNAME1 $_CHIPNAME.cpu.0
set _TARGETNAME2 $_CHIPNAME.cpu.1
@@
-46,7
+46,7
@@
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
target create $_TARGETNAME1 cortex_a -dap $_CHIPNAME.dap \
-coreid 0 -dbgbase 0x80110000
target create $_TARGETNAME1 cortex_a -dap $_CHIPNAME.dap \
-coreid 0 -dbgbase 0x80110000
-$_TARGETNAME1 configure -event reset-start { adapter
_khz
1000 }
+$_TARGETNAME1 configure -event reset-start { adapter
speed
1000 }
$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
@@
-54,7
+54,7
@@
$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
#target create $_TARGETNAME2 cortex_a -dap $_CHIPNAME.dap \
# -coreid 1 -dbgbase 0x80112000
#target create $_TARGETNAME2 cortex_a -dap $_CHIPNAME.dap \
# -coreid 1 -dbgbase 0x80112000
-#$_TARGETNAME2 configure -event reset-start { adapter
_khz
1000 }
+#$_TARGETNAME2 configure -event reset-start { adapter
speed
1000 }
#$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
proc cycv_dbginit {target} {
#$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
proc cycv_dbginit {target} {