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tcl/target/stm32l4x: set default WORKAREASIZE to smallest device
[fw/openocd]
/
tcl
/
board
/
hitex_lpc2929.cfg
diff --git
a/tcl/board/hitex_lpc2929.cfg
b/tcl/board/hitex_lpc2929.cfg
index d2515371df806f4c6cfc6f550aa8dc11eb0820eb..8268306695592dc02a7d3485f16caaea005a488f 100644
(file)
--- a/
tcl/board/hitex_lpc2929.cfg
+++ b/
tcl/board/hitex_lpc2929.cfg
@@
-2,12
+2,12
@@
# http://www.hitex.com/
# Delays on reset lines
# http://www.hitex.com/
# Delays on reset lines
-adapter
_nsrst_
delay 50
+adapter
srst
delay 50
jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
# Adaptive clocking through RTCK is not supported.
jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
# Adaptive clocking through RTCK is not supported.
-adapter
_khz
2000
+adapter
speed
2000
# Target device: LPC29xx with ETB
# The following variables are used by the LPC2900 script:
# Target device: LPC29xx with ETB
# The following variables are used by the LPC2900 script:
@@
-24,7
+24,7
@@
$_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
# Event handlers
$_TARGETNAME configure -event reset-start {
# Back to the slow JTAG clock
# Event handlers
$_TARGETNAME configure -event reset-start {
# Back to the slow JTAG clock
- adapter
_khz
2000
+ adapter
speed
2000
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
@@
-34,7
+34,7
@@
flash bank $_FLASHNAME cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
$_TARGETNAME configure -event reset-init {
# Flash
$_TARGETNAME configure -event reset-init {
# Flash
- mww 0x20200010 0x00000007 ;# FBWST: 7 wait states, not c
h
ached
+ mww 0x20200010 0x00000007 ;# FBWST: 7 wait states, not cached
# Use PLL
mww 0xFFFF8020 0x00000001 ;# XTAL_OSC_CONTROL: enable, 1-20 MHz
# Use PLL
mww 0xFFFF8020 0x00000001 ;# XTAL_OSC_CONTROL: enable, 1-20 MHz
@@
-46,7
+46,7
@@
$_TARGETNAME configure -event reset-init {
mww 0xFFFF8070 0x02000000 ;# SYS_CLK_CONF: PLL
# Increase JTAG speed
mww 0xFFFF8070 0x02000000 ;# SYS_CLK_CONF: PLL
# Increase JTAG speed
- adapter
_khz
6000
+ adapter
speed
6000
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
mww 0xE0001138 0x0000001F ;# P1.14 = D0
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
mww 0xE0001138 0x0000001F ;# P1.14 = D0
@@
-103,4
+103,3
@@
$_TARGETNAME configure -event reset-init {
mww 0x600000CC 0x0000000C ;# Bank7 WST2=8
mww 0x600000C4 0x00000002 ;# Bank7 IDCY=2
}
mww 0x600000CC 0x0000000C ;# Bank7 WST2=8
mww 0x600000C4 0x00000002 ;# Bank7 IDCY=2
}
-