- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
- mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
- mww 0x20000000 0x00000000
-
- # Issue 16 bit SDRAM command: Set mode register
- mww 0xffffffb0 0x00000013 # SDRAMC_MR_OFF
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+ mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
+ mww 0x20000000 0x00000000
+
+ # Issue 16 bit SDRAM command: Set mode register
+ mww 0xffffffb0 0x00000013 ;# SDRAMC_MR_OFF