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tcl: Update Flyswatter product links
[fw/openocd]
/
tcl
/
board
/
csb337.cfg
diff --git
a/tcl/board/csb337.cfg
b/tcl/board/csb337.cfg
index 1157cb826aa8a6ff41069b299b5a9fc082c218d7..a9d0139298fcac47d964a32541c74f48649980b2 100644
(file)
--- a/
tcl/board/csb337.cfg
+++ b/
tcl/board/csb337.cfg
@@
-4,7
+4,8
@@
source [find target/at91rm9200.cfg]
# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
source [find target/at91rm9200.cfg]
# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
-flash bank cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
# ETM9 trace port connector present on this board, 16 data pins.
if { [info exists ETM_DRIVER] } {
# ETM9 trace port connector present on this board, 16 data pins.
if { [info exists ETM_DRIVER] } {
@@
-18,7
+19,7
@@
if { [info exists ETM_DRIVER] } {
proc csb337_clk_init { } {
# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
proc csb337_clk_init { } {
# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
-
jtag_khz
8
+
adapter speed
8
# CKGR_MOR: start main oscillator (3.6864 MHz)
mww 0xfffffc20 0xff01
# CKGR_MOR: start main oscillator (3.6864 MHz)
mww 0xfffffc20 0xff01
@@
-36,7
+37,7
@@
proc csb337_clk_init { } {
sleep 20
# CPU is in Normal Mode ... allows faster JTAG clock speed
sleep 20
# CPU is in Normal Mode ... allows faster JTAG clock speed
-
jtag_khz
40000
+
adapter speed
40000
}
proc csb337_nor_init { } {
}
proc csb337_nor_init { } {
@@
-108,11
+109,9
@@
proc csb337_reset_init { } {
# I(12) = 1
# - Reserved/ones
# 6:3 = 1
# I(12) = 1
# - Reserved/ones
# 6:3 = 1
- # - Alignment traps enabled
- # A(1) = 1
- arm920t cp15 2 0xc000107a
+ arm920t cp15 2 0xc0001078
}
$_TARGETNAME configure -event reset-init {csb337_reset_init}
}
$_TARGETNAME configure -event reset-init {csb337_reset_init}
-# vim:syntax tcl
+arm7_9 fast_memory_access enable