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More AVR stuff
[fw/sdcc]
/
src
/
z80
/
main.c
diff --git
a/src/z80/main.c
b/src/z80/main.c
index f076c45e940f6b3d3546b4097bf2d1dc2b6e8315..bad1c014aa8aec75353aa60881854e915f4d9d30 100644
(file)
--- a/
src/z80/main.c
+++ b/
src/z80/main.c
@@
-1,30
+1,61
@@
-#include "common.h"
-#include "ralloc.h"
+#include "z80.h"
+
+static char _defaultRules[] =
+{
+#include "peeph.rul"
+#include "peeph-z80.rul"
+};
+
+Z80_OPTS z80_opts;
static char *_z80_keywords[] = { NULL };
static char *_z80_keywords[] = { NULL };
-void z80_assignRegisters (eBBlock **ebbs, int count);
+static void _z80_init(void)
+{
+ z80_opts.sub = SUB_Z80;
+}
+
+static int regParmFlg = 0; /* determine if we can register a parameter */
+
+static void _z80_reset_regparm()
+{
+ regParmFlg = 0;
+}
-static bool _z80_parseOptions(int *pargc, char **argv)
+static int _z80_reg_parm(link *l)
+{
+ /* for this processor it is simple
+ can pass only the first parameter in a register */
+ if (regParmFlg)
+ return 0;
+
+ regParmFlg = 1;
+ return 1;
+
+}
+
+static bool _z80_parseOptions(int *pargc, char **argv, int *i)
{
return FALSE;
}
static void _z80_finaliseOptions(void)
{
{
return FALSE;
}
static void _z80_finaliseOptions(void)
{
+ port->mem.default_local_map = data;
+ port->mem.default_globl_map = data;
}
static void _z80_setDefaultOptions(void)
{
options.genericPtr = 1; /* default on */
}
static void _z80_setDefaultOptions(void)
{
options.genericPtr = 1; /* default on */
- options.nopeep =
1
;
+ options.nopeep =
0
;
options.stackAuto = 1;
options.mainreturn = 1;
options.noregparms = 1;
/* first the options part */
options.intlong_rent = 1;
options.stackAuto = 1;
options.mainreturn = 1;
options.noregparms = 1;
/* first the options part */
options.intlong_rent = 1;
- optimize.global_cse =
0
;
+ optimize.global_cse =
1
;
optimize.label1 = 1;
optimize.label2 = 1;
optimize.label3 = 1;
optimize.label1 = 1;
optimize.label2 = 1;
optimize.label3 = 1;
@@
-59,6
+90,9
@@
static const char *_asmCmd[] = {
PORT z80_port = {
"z80",
"Zilog Z80", /* Target name */
PORT z80_port = {
"z80",
"Zilog Z80", /* Target name */
+ {
+ FALSE,
+ },
{
_asmCmd,
"-plosgff", /* Options with debug */
{
_asmCmd,
"-plosgff", /* Options with debug */
@@
-67,6
+101,9
@@
PORT z80_port = {
{
_linkCmd
},
{
_linkCmd
},
+ {
+ _defaultRules
+ },
{
/* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
1, 1, 2, 4, 2, 2, 2, 1, 4, 4
{
/* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
1, 1, 2, 4, 2, 2, 2, 1, 4, 4
@@
-81,7
+118,11
@@
PORT z80_port = {
"_BSEG",
"_RSEG",
"_GSINIT",
"_BSEG",
"_RSEG",
"_GSINIT",
- "_OVERLAY"
+ "_OVERLAY",
+ "_GSFINAL",
+ NULL,
+ NULL,
+ 1
},
{
-1, 0, 0, 8, 0
},
{
-1, 0, 0, 8, 0
@@
-90,11
+131,16
@@
PORT z80_port = {
{
0
},
{
0
},
+ _z80_init,
_z80_parseOptions,
_z80_finaliseOptions,
_z80_setDefaultOptions,
z80_assignRegisters,
_z80_getRegName,
_z80_parseOptions,
_z80_finaliseOptions,
_z80_setDefaultOptions,
z80_assignRegisters,
_z80_getRegName,
- _z80_keywords
+ _z80_keywords,
+ 0, /* no assembler preamble */
+ 0, /* no local IVT generation code */
+ _z80_reset_regparm,
+ _z80_reg_parm
};
};