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target/riscv: add common magic
[fw/openocd]
/
src
/
target
/
riscv
/
riscv.h
diff --git
a/src/target/riscv/riscv.h
b/src/target/riscv/riscv.h
index efbd71c327399188dfeaaf8ec24829613ba267e0..fcb1380d48df22bd3de4d0b6a45ec5b40b4c3532 100644
(file)
--- a/
src/target/riscv/riscv.h
+++ b/
src/target/riscv/riscv.h
@@
-13,6
+13,8
@@
struct riscv_program;
#include "target/semihosting_common.h"
#include <helper/command.h>
#include "target/semihosting_common.h"
#include <helper/command.h>
+#define RISCV_COMMON_MAGIC 0x52495356U
+
/* The register cache is statically allocated. */
#define RISCV_MAX_HARTS 1024
#define RISCV_MAX_REGISTERS 5000
/* The register cache is statically allocated. */
#define RISCV_MAX_HARTS 1024
#define RISCV_MAX_REGISTERS 5000
@@
-86,6
+88,8
@@
typedef struct {
} range_list_t;
struct riscv_info {
} range_list_t;
struct riscv_info {
+ unsigned int common_magic;
+
unsigned dtm_version;
struct command_context *cmd_ctx;
unsigned dtm_version;
struct command_context *cmd_ctx;
@@
-269,6
+273,11
@@
static inline struct riscv_info *riscv_info(const struct target *target)
}
#define RISCV_INFO(R) struct riscv_info *R = riscv_info(target);
}
#define RISCV_INFO(R) struct riscv_info *R = riscv_info(target);
+static inline bool is_riscv(const struct riscv_info *riscv_info)
+{
+ return riscv_info->common_magic == RISCV_COMMON_MAGIC;
+}
+
extern uint8_t ir_dtmcontrol[4];
extern struct scan_field select_dtmcontrol;
extern uint8_t ir_dbus[4];
extern uint8_t ir_dtmcontrol[4];
extern struct scan_field select_dtmcontrol;
extern uint8_t ir_dbus[4];