projects
/
fw
/
openocd
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
arm_adi_v5: drop ANY_ID from table dap_part_nums
[fw/openocd]
/
src
/
target
/
mips32.c
diff --git
a/src/target/mips32.c
b/src/target/mips32.c
index 3929a8c99dc013bf1ab122236f2ca6061130937a..c82536931e4d2f1c834746297519f92ea350642b 100644
(file)
--- a/
src/target/mips32.c
+++ b/
src/target/mips32.c
@@
-473,7
+473,7
@@
int mips32_run_algorithm(struct target *target, int num_mem_params,
if (reg_params[i].direction == PARAM_IN)
continue;
if (reg_params[i].direction == PARAM_IN)
continue;
- struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name,
0
);
+ struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name,
false
);
if (!reg) {
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
if (!reg) {
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@
-507,7
+507,7
@@
int mips32_run_algorithm(struct target *target, int num_mem_params,
for (int i = 0; i < num_reg_params; i++) {
if (reg_params[i].direction != PARAM_OUT) {
for (int i = 0; i < num_reg_params; i++) {
if (reg_params[i].direction != PARAM_OUT) {
- struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name,
0
);
+ struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name,
false
);
if (!reg) {
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_COMMAND_SYNTAX_ERROR;
if (!reg) {
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_COMMAND_SYNTAX_ERROR;
@@
-723,9
+723,9
@@
int mips32_read_config_regs(struct target *target)
break; /* no more config registers implemented */
}
else
break; /* no more config registers implemented */
}
else
- return ERROR_OK; /* already succesfully read */
+ return ERROR_OK; /* already succes
s
fully read */
- LOG_DEBUG("read %"PRI
d
32" config registers", ejtag_info->config_regs);
+ LOG_DEBUG("read %"PRI
u
32" config registers", ejtag_info->config_regs);
if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
mips32->isa_imp = MIPS32_MIPS16;
if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
mips32->isa_imp = MIPS32_MIPS16;
@@
-950,11
+950,11
@@
COMMAND_HANDLER(mips32_handle_cp0_command)
retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access reg %" PRI
i
32,
+ "couldn't access reg %" PRI
u
32,
cp0_reg);
return ERROR_OK;
}
cp0_reg);
return ERROR_OK;
}
- command_print(CMD, "cp0 reg %" PRI
i32 ", select %" PRIi
32 ": %8.8" PRIx32,
+ command_print(CMD, "cp0 reg %" PRI
u32 ", select %" PRIu
32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
} else if (CMD_ARGC == 3) {
cp0_reg, cp0_sel, value);
} else if (CMD_ARGC == 3) {
@@
-963,11
+963,11
@@
COMMAND_HANDLER(mips32_handle_cp0_command)
retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access cp0 reg %" PRI
i32 ", select %" PRIi
32,
+ "couldn't access cp0 reg %" PRI
u32 ", select %" PRIu
32,
cp0_reg, cp0_sel);
return ERROR_OK;
}
cp0_reg, cp0_sel);
return ERROR_OK;
}
- command_print(CMD, "cp0 reg %" PRI
i32 ", select %" PRIi
32 ": %8.8" PRIx32,
+ command_print(CMD, "cp0 reg %" PRI
u32 ", select %" PRIu
32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
}
}
cp0_reg, cp0_sel, value);
}
}