* The chip has two taps in the JTAG chain, the Master tap and the Core tap.
* In this code the Master tap is only used to unlock the flash memory by executing a JTAG instruction.
*
* The chip has two taps in the JTAG chain, the Master tap and the Core tap.
* In this code the Master tap is only used to unlock the flash memory by executing a JTAG instruction.
*
* ----------------------------------------------------------------
*/
#define DSP5680XX_ONCE_NOREG 0x00 /* No register selected */
* ----------------------------------------------------------------
*/
#define DSP5680XX_ONCE_NOREG 0x00 /* No register selected */
#define FLUSH_COUNT_READ_WRITE 8192 /* This value works, higher values (and lower...) may work as well. */
#define FLUSH_COUNT_FLASH 8192
/** ----------------------------------------------------------------
#define FLUSH_COUNT_READ_WRITE 8192 /* This value works, higher values (and lower...) may work as well. */
#define FLUSH_COUNT_FLASH 8192
/** ----------------------------------------------------------------
* ----------------------------------------------------------------
*/
#define HFM_BASE_ADDR 0x0F400 /** In x: mem. (write to S_FILE_DATA_OFFSET+HFM_BASE_ADDR
* ----------------------------------------------------------------
*/
#define HFM_BASE_ADDR 0x0F400 /** In x: mem. (write to S_FILE_DATA_OFFSET+HFM_BASE_ADDR
* ----------------------------------------------------------------
*/
#define MC568013_EONCE_OBASE_ADDR 0xFF
* ----------------------------------------------------------------
*/
#define MC568013_EONCE_OBASE_ADDR 0xFF