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Transform 'u16' to 'uint16_t'
[fw/openocd]
/
src
/
target
/
cortex_a8.c
diff --git
a/src/target/cortex_a8.c
b/src/target/cortex_a8.c
index 1e36f336bbc25bef5b76057b4b3ec20f33011306..5728c6aac21cd37089f369e38fe98e3c3cebcaf4 100644
(file)
--- a/
src/target/cortex_a8.c
+++ b/
src/target/cortex_a8.c
@@
-35,6
+35,7
@@
#include "cortex_a8.h"
#include "target_request.h"
#include "cortex_a8.h"
#include "target_request.h"
+#include "target_type.h"
/* cli handling */
/* cli handling */
@@
-82,13
+83,13
@@
target_type_t cortexa8_target =
.quit = NULL
};
.quit = NULL
};
-int cortex_a8_dcc_read(swjdp_common_t *swjdp, u
8 *value, u8
*ctrl)
+int cortex_a8_dcc_read(swjdp_common_t *swjdp, u
int8_t *value, uint8_t
*ctrl)
{
{
- u
16
dcrdr;
+ u
int16_t
dcrdr;
- mem_ap_read_buf_u16( swjdp, (u
8
*)&dcrdr, 1, DCB_DCRDR);
- *ctrl = (u
8
)dcrdr;
- *value = (u
8
)(dcrdr >> 8);
+ mem_ap_read_buf_u16( swjdp, (u
int8_t
*)&dcrdr, 1, DCB_DCRDR);
+ *ctrl = (u
int8_t
)dcrdr;
+ *value = (u
int8_t
)(dcrdr >> 8);
LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
@@
-97,13
+98,13
@@
int cortex_a8_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
if (dcrdr & (1 << 0))
{
dcrdr = 0;
if (dcrdr & (1 << 0))
{
dcrdr = 0;
- mem_ap_write_buf_u16( swjdp, (u
8
*)&dcrdr, 1, DCB_DCRDR);
+ mem_ap_write_buf_u16( swjdp, (u
int8_t
*)&dcrdr, 1, DCB_DCRDR);
}
return ERROR_OK;
}
}
return ERROR_OK;
}
-int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u
8
*buffer)
+int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u
int8_t
*buffer)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@
-135,7
+136,7
@@
int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 co
return retval;
}
return retval;
}
-int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u
8
*buffer)
+int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u
int8_t
*buffer)
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
{
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
@@
-168,7
+169,7
@@
int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 c
int cortex_a8_handle_target_request(void *priv)
{
target_t *target = priv;
int cortex_a8_handle_target_request(void *priv)
{
target_t *target = priv;
- if (!target
->type->examined
)
+ if (!target
_was_examined(target)
)
return ERROR_OK;
armv7m_common_t *armv7m = target->arch_info;
swjdp_common_t *swjdp = &armv7m->swjdp_info;
return ERROR_OK;
armv7m_common_t *armv7m = target->arch_info;
swjdp_common_t *swjdp = &armv7m->swjdp_info;
@@
-178,8
+179,8
@@
int cortex_a8_handle_target_request(void *priv)
if (target->state == TARGET_RUNNING)
{
if (target->state == TARGET_RUNNING)
{
- u
8
data;
- u
8
ctrl;
+ u
int8_t
data;
+ u
int8_t
ctrl;
cortex_a8_dcc_read(swjdp, &data, &ctrl);
cortex_a8_dcc_read(swjdp, &data, &ctrl);