+ struct armv7a_cachesize i_size; /* instruction cache */
+};
+
+/* common cache information */
+struct armv7a_cache_common {
+ int info; /* -1 invalid, else valid */
+ int loc; /* level of coherency */
+ uint32_t dminline; /* minimum d-cache linelen */
+ uint32_t iminline; /* minimum i-cache linelen */
+ struct armv7a_arch_cache arch[6]; /* cache info, L1 - L7 */