- u32 (*get_ttb)(target_t *target);
- int (*read_memory)(target_t *target, u32 address, u32 size, u32 count, u8 *buffer);
- int (*write_memory)(target_t *target, u32 address, u32 size, u32 count, u8 *buffer);
- void (*disable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
- void (*enable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
- armv4_5_cache_common_t armv4_5_cache;
+ uint32_t (*get_ttb)(struct target *target);
+ int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+ int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+ void (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
+ void (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
+ struct armv4_5_cache_common armv4_5_cache;