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C99 printf() -Werror fixes
[fw/openocd]
/
src
/
target
/
arm9tdmi.c
diff --git
a/src/target/arm9tdmi.c
b/src/target/arm9tdmi.c
index dba679aa7dc06652a5b8cb86035aa2f41fb6466a..07146c51cbedc3f7df199314153270aeecf37d09 100644
(file)
--- a/
src/target/arm9tdmi.c
+++ b/
src/target/arm9tdmi.c
@@
-107,11
+107,11
@@
int arm9tdmi_examine_debug_reason(target_t *target)
&& (target->debug_reason != DBG_REASON_SINGLESTEP))
{
scan_field_t fields[3];
&& (target->debug_reason != DBG_REASON_SINGLESTEP))
{
scan_field_t fields[3];
- u
8
databus[4];
- u
8
instructionbus[4];
- u
8
debug_reason;
+ u
int8_t
databus[4];
+ u
int8_t
instructionbus[4];
+ u
int8_t
debug_reason;
- jtag_
add
_end_state(TAP_DRPAUSE);
+ jtag_
set
_end_state(TAP_DRPAUSE);
fields[0].tap = arm7_9->jtag_info.tap;
fields[0].num_bits = 32;
fields[0].tap = arm7_9->jtag_info.tap;
fields[0].num_bits = 32;
@@
-134,7
+134,7
@@
int arm9tdmi_examine_debug_reason(target_t *target)
}
arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
}
arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
- jtag_add_dr_scan(3, fields,
TAP_DRPAUSE
);
+ jtag_add_dr_scan(3, fields,
jtag_set_end_state(TAP_DRPAUSE)
);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
@@
-147,7
+147,7
@@
int arm9tdmi_examine_debug_reason(target_t *target)
fields[2].in_value = NULL;
fields[2].out_value = instructionbus;
fields[2].in_value = NULL;
fields[2].out_value = instructionbus;
- jtag_add_dr_scan(3, fields,
TAP_DRPAUSE
);
+ jtag_add_dr_scan(3, fields,
jtag_set_end_state(TAP_DRPAUSE)
);
if (debug_reason & 0x4)
if (debug_reason & 0x2)
if (debug_reason & 0x4)
if (debug_reason & 0x2)
@@
-162,13
+162,13
@@
int arm9tdmi_examine_debug_reason(target_t *target)
}
/* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */
}
/* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */
-int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u
32 instr, u32 out, u32
*in, int sysspeed)
+int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u
int32_t instr, uint32_t out, uint32_t
*in, int sysspeed)
{
int retval = ERROR_OK;
scan_field_t fields[3];
{
int retval = ERROR_OK;
scan_field_t fields[3];
- u
8
out_buf[4];
- u
8
instr_buf[4];
- u
8
sysspeed_buf = 0x0;
+ u
int8_t
out_buf[4];
+ u
int8_t
instr_buf[4];
+ u
int8_t
sysspeed_buf = 0x0;
/* prepare buffer */
buf_set_u32(out_buf, 0, 32, out);
/* prepare buffer */
buf_set_u32(out_buf, 0, 32, out);
@@
-178,7
+178,7
@@
int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
if (sysspeed)
buf_set_u32(&sysspeed_buf, 2, 1, 1);
if (sysspeed)
buf_set_u32(&sysspeed_buf, 2, 1, 1);
- jtag_
add
_end_state(TAP_DRPAUSE);
+ jtag_
set
_end_state(TAP_DRPAUSE);
if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
@@
-203,17
+203,17
@@
int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
if (in)
{
if (in)
{
- fields[0].in_value=(u
8
*)in;
- jtag_add_dr_scan(3, fields, jtag_
add_end_state(TAP_INVALID
));
+ fields[0].in_value=(u
int8_t
*)in;
+ jtag_add_dr_scan(3, fields, jtag_
get_end_state(
));
- jtag_add_callback(arm_le_to_h_u32, (
u8 *
)in);
+ jtag_add_callback(arm_le_to_h_u32, (
jtag_callback_data_t
)in);
}
else
{
}
else
{
- jtag_add_dr_scan(3, fields, jtag_
add_end_state(TAP_INVALID
));
+ jtag_add_dr_scan(3, fields, jtag_
get_end_state(
));
}
}
- jtag_add_runtest(0, jtag_
add_end_state(TAP_INVALID
));
+ jtag_add_runtest(0, jtag_
get_end_state(
));
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
@@
-235,12
+235,12
@@
int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
}
/* just read data (instruction and data-out = don't care) */
}
/* just read data (instruction and data-out = don't care) */
-int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u
32
*in)
+int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u
int32_t
*in)
{
int retval = ERROR_OK;;
scan_field_t fields[3];
{
int retval = ERROR_OK;;
scan_field_t fields[3];
- jtag_
add
_end_state(TAP_DRPAUSE);
+ jtag_
set
_end_state(TAP_DRPAUSE);
if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
@@
-251,7
+251,7
@@
int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
- fields[0].in_value = (u
8
*)in;
+ fields[0].in_value = (u
int8_t
*)in;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
@@
-263,11
+263,11
@@
int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[2].out_value = NULL;
fields[2].in_value = NULL;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_
add_end_state(TAP_INVALID
));
+ jtag_add_dr_scan(3, fields, jtag_
get_end_state(
));
- jtag_add_callback(arm_le_to_h_u32, (
u8 *
)in);
+ jtag_add_callback(arm_le_to_h_u32, (
jtag_callback_data_t
)in);
- jtag_add_runtest(0, jtag_
add_end_state(TAP_INVALID
));
+ jtag_add_runtest(0, jtag_
get_end_state(
));
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
@@
-290,11
+290,12
@@
int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
return ERROR_OK;
}
return ERROR_OK;
}
-extern void arm_endianness(u
8
*tmp, void *in, int size, int be, int flip);
+extern void arm_endianness(u
int8_t
*tmp, void *in, int size, int be, int flip);
-static int arm9endianness(
u8 *in
, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm9endianness(
jtag_callback_data_t arg
, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{
{
- arm_endianness((u8 *)captured, in, (int)size, (int)be, 0);
+ uint8_t *in=(uint8_t *)arg;
+ arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
return ERROR_OK;
}
return ERROR_OK;
}
@@
-307,7
+308,7
@@
int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
int retval = ERROR_OK;
scan_field_t fields[3];
int retval = ERROR_OK;
scan_field_t fields[3];
- jtag_
add
_end_state(TAP_DRPAUSE);
+ jtag_
set
_end_state(TAP_DRPAUSE);
if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
@@
-330,11
+331,11
@@
int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[2].out_value = NULL;
fields[2].in_value = NULL;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_
add_end_state(TAP_INVALID
));
+ jtag_add_dr_scan(3, fields, jtag_
get_end_state(
));
- jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
+ jtag_add_callback4(arm9endianness,
(jtag_callback_data_t)
in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
- jtag_add_runtest(0, jtag_
add_end_state(TAP_INVALID
));
+ jtag_add_runtest(0, jtag_
get_end_state(
));
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
@@
-345,7
+346,7
@@
int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
if (in)
{
if (in)
{
- LOG_DEBUG("in: 0x%8.8x", *(u
32
*)in);
+ LOG_DEBUG("in: 0x%8.8x", *(u
int32_t
*)in);
}
else
{
}
else
{
@@
-357,7
+358,7
@@
int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
return ERROR_OK;
}
return ERROR_OK;
}
-void arm9tdmi_change_to_arm(target_t *target, u
32 *r0, u32
*pc)
+void arm9tdmi_change_to_arm(target_t *target, u
int32_t *r0, uint32_t
*pc)
{
int retval = ERROR_OK;
/* get pointers to arch-specific information */
{
int retval = ERROR_OK;
/* get pointers to arch-specific information */
@@
-412,7
+413,7
@@
void arm9tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc)
*pc -= 0xc;
}
*pc -= 0xc;
}
-void arm9tdmi_read_core_regs(target_t *target, u
32 mask, u32
* core_regs[16])
+void arm9tdmi_read_core_regs(target_t *target, u
int32_t mask, uint32_t
* core_regs[16])
{
int i;
/* get pointers to arch-specific information */
{
int i;
/* get pointers to arch-specific information */
@@
-438,7
+439,7
@@
void arm9tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16])
}
}
}
}
-void arm9tdmi_read_core_regs_target_buffer(target_t *target, u
32
mask, void* buffer, int size)
+void arm9tdmi_read_core_regs_target_buffer(target_t *target, u
int32_t
mask, void* buffer, int size)
{
int i;
/* get pointers to arch-specific information */
{
int i;
/* get pointers to arch-specific information */
@@
-446,9
+447,9
@@
void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
- u
32
*buf_u32 = buffer;
- u
16
*buf_u16 = buffer;
- u
8
*buf_u8 = buffer;
+ u
int32_t
*buf_u32 = buffer;
+ u
int16_t
*buf_u16 = buffer;
+ u
int8_t
*buf_u8 = buffer;
/* STMIA r0-15, [r0] at debug speed
* register values will start to appear on 4th DCLK
/* STMIA r0-15, [r0] at debug speed
* register values will start to appear on 4th DCLK
@@
-479,7
+480,7
@@
void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
}
}
}
}
-void arm9tdmi_read_xpsr(target_t *target, u
32
*xpsr, int spsr)
+void arm9tdmi_read_xpsr(target_t *target, u
int32_t
*xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@
-503,14
+504,14
@@
void arm9tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
}
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
}
-void arm9tdmi_write_xpsr(target_t *target, u
32
xpsr, int spsr)
+void arm9tdmi_write_xpsr(target_t *target, u
int32_t
xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
- LOG_DEBUG("xpsr: %8.8
x
, spsr: %i", xpsr, spsr);
+ LOG_DEBUG("xpsr: %8.8
" PRIx32 "
, spsr: %i", xpsr, spsr);
/* MSR1 fetched */
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
/* MSR1 fetched */
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
@@
-539,7
+540,7
@@
void arm9tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void arm9tdmi_write_xpsr_im8(target_t *target, u
8
xpsr_im, int rot, int spsr)
+void arm9tdmi_write_xpsr_im8(target_t *target, u
int8_t
xpsr_im, int rot, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@
-565,7
+566,7
@@
void arm9tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
}
}
}
}
-void arm9tdmi_write_core_regs(target_t *target, u
32 mask, u32
core_regs[16])
+void arm9tdmi_write_core_regs(target_t *target, u
int32_t mask, uint32_t
core_regs[16])
{
int i;
/* get pointers to arch-specific information */
{
int i;
/* get pointers to arch-specific information */
@@
-592,7
+593,7
@@
void arm9tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16])
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void arm9tdmi_load_word_regs(target_t *target, u
32
mask)
+void arm9tdmi_load_word_regs(target_t *target, u
int32_t
mask)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@
-628,7
+629,7
@@
void arm9tdmi_load_byte_reg(target_t *target, int num)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
}
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
}
-void arm9tdmi_store_word_regs(target_t *target, u
32
mask)
+void arm9tdmi_store_word_regs(target_t *target, u
int32_t
mask)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@
-664,7
+665,7
@@
void arm9tdmi_store_byte_reg(target_t *target, int num)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
}
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
}
-void arm9tdmi_write_pc(target_t *target, u
32
pc)
+void arm9tdmi_write_pc(target_t *target, u
int32_t
pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@
-761,7
+762,7
@@
void arm9tdmi_branch_resume_thumb(target_t *target)
arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
}
arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
}
-void arm9tdmi_enable_single_step(target_t *target, u
32
next_pc)
+void arm9tdmi_enable_single_step(target_t *target, u
int32_t
next_pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@
-978,7
+979,7
@@
int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha
arm7_9_common_t *arm7_9;
arm9tdmi_common_t *arm9tdmi;
reg_t *vector_catch;
arm7_9_common_t *arm7_9;
arm9tdmi_common_t *arm9tdmi;
reg_t *vector_catch;
- u
32
vector_catch_value;
+ u
int32_t
vector_catch_value;
int i, j;
if (arm9tdmi_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi) != ERROR_OK)
int i, j;
if (arm9tdmi_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi) != ERROR_OK)