+ /* write directly to physical memory,
+ * bypassing any read only MMU bits, etc.
+ */
+ retval = armv4_5_mmu_write_physical(target,
+ &arm920t->armv4_5_mmu, pa, size,
+ count, buffer);
+ if (retval != ERROR_OK)
+ return retval;
+ } else {
+ retval = arm7_9_write_memory(target, address, size, count, buffer);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
+ /* If ICache is enabled, we have to invalidate affected ICache lines
+ * the DCache is forced to write-through,
+ * so we don't have to clean it here
+ */
+ if (arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled) {
+ if (count <= 1) {
+ /* invalidate ICache single entry with MVA
+ * mcr 15, 0, r0, cr7, cr5, {1}
+ */
+ LOG_DEBUG("I-Cache enabled, "
+ "invalidating affected I-Cache line");
+ retval = arm920t_write_cp15_interpreted(target,
+ ARMV4_5_MCR(15, 0, 0, 7, 5, 1),
+ 0x0, address & cache_mask);
+ if (retval != ERROR_OK)
+ return retval;
+ } else {
+ /* invalidate ICache
+ * mcr 15, 0, r0, cr7, cr5, {0}
+ */
+ retval = arm920t_write_cp15_interpreted(target,
+ ARMV4_5_MCR(15, 0, 0, 7, 5, 0),
+ 0x0, 0x0);