- int (*examine_debug_reason)(target_t *target);
-
- void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc);
-
- void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]);
- void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size);
- void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr);
-
- void (*write_xpsr)(target_t *target, u32 xpsr, int spsr);
- void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr);
- void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
-
- void (*load_word_regs)(target_t *target, u32 mask);
+ int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
+
+ void (*change_to_arm)(target_t *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */
+
+ void (*read_core_regs)(target_t *target, uint32_t mask, uint32_t *core_regs[16]); /**< Function for reading the core registers */
+ void (*read_core_regs_target_buffer)(target_t *target, uint32_t mask, void *buffer, int size);
+ void (*read_xpsr)(target_t *target, uint32_t *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
+
+ void (*write_xpsr)(target_t *target, uint32_t xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
+ void (*write_xpsr_im8)(target_t *target, uint8_t xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
+ void (*write_core_regs)(target_t *target, uint32_t mask, uint32_t core_regs[16]);
+
+ void (*load_word_regs)(target_t *target, uint32_t mask);