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flash fillX now has a verify stage
[fw/openocd]
/
src
/
jtag
/
ep93xx.c
diff --git
a/src/jtag/ep93xx.c
b/src/jtag/ep93xx.c
index 88ed50c1f2fe41286931083f536e3112af3f3050..d79a0d67c1660306d30001ff1bf9581d35e67b9d 100644
(file)
--- a/
src/jtag/ep93xx.c
+++ b/
src/jtag/ep93xx.c
@@
-37,6
+37,7
@@
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
+#include <time.h>
#include <sys/mman.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <unistd.h>
#include <fcntl.h>
@@
-49,24
+50,22
@@
static volatile u8 *gpio_data_direction_register;
/* low level command set
*/
/* low level command set
*/
-int ep93xx_read(void);
-void ep93xx_write(int tck, int tms, int tdi);
-void ep93xx_reset(int trst, int srst);
+
static
int ep93xx_read(void);
+
static
void ep93xx_write(int tck, int tms, int tdi);
+
static
void ep93xx_reset(int trst, int srst);
-int ep93xx_speed(int speed);
-int ep93xx_register_commands(struct command_context_s *cmd_ctx);
-int ep93xx_init(void);
-int ep93xx_quit(void);
+
static
int ep93xx_speed(int speed);
+
static
int ep93xx_register_commands(struct command_context_s *cmd_ctx);
+
static
int ep93xx_init(void);
+
static
int ep93xx_quit(void);
struct timespec ep93xx_zzzz;
jtag_interface_t ep93xx_interface =
{
.name = "ep93xx",
struct timespec ep93xx_zzzz;
jtag_interface_t ep93xx_interface =
{
.name = "ep93xx",
-
- .execute_queue = bitbang_execute_queue,
- .
support_pathmove = 0
,
+ .
execute_queue = bitbang_execute_queue
,
.speed = ep93xx_speed,
.register_commands = ep93xx_register_commands,
.speed = ep93xx_speed,
.register_commands = ep93xx_register_commands,
@@
-74,63
+73,64
@@
jtag_interface_t ep93xx_interface =
.quit = ep93xx_quit,
};
.quit = ep93xx_quit,
};
-bitbang_interface_t ep93xx_bitbang =
+
static
bitbang_interface_t ep93xx_bitbang =
{
.read = ep93xx_read,
.write = ep93xx_write,
{
.read = ep93xx_read,
.write = ep93xx_write,
- .reset = ep93xx_reset
+ .reset = ep93xx_reset,
+ .blink = 0,
};
};
-int ep93xx_read(void)
+
static
int ep93xx_read(void)
{
return !!(*gpio_data_register & TDO_BIT);
}
{
return !!(*gpio_data_register & TDO_BIT);
}
-void ep93xx_write(int tck, int tms, int tdi)
+
static
void ep93xx_write(int tck, int tms, int tdi)
{
if (tck)
output_value |= TCK_BIT;
else
{
if (tck)
output_value |= TCK_BIT;
else
- output_value &= TCK_BIT;
+ output_value &=
~
TCK_BIT;
if (tms)
output_value |= TMS_BIT;
else
if (tms)
output_value |= TMS_BIT;
else
- output_value &= TMS_BIT;
+ output_value &=
~
TMS_BIT;
if (tdi)
output_value |= TDI_BIT;
else
if (tdi)
output_value |= TDI_BIT;
else
- output_value &= TDI_BIT;
+ output_value &=
~
TDI_BIT;
*gpio_data_register = output_value;
*gpio_data_register = output_value;
- nanosleep(
ep93xx_zzzz
);
+ nanosleep(
&ep93xx_zzzz, NULL
);
}
/* (1) assert or (0) deassert reset lines */
}
/* (1) assert or (0) deassert reset lines */
-void ep93xx_reset(int trst, int srst)
+
static
void ep93xx_reset(int trst, int srst)
{
if (trst == 0)
output_value |= TRST_BIT;
else if (trst == 1)
{
if (trst == 0)
output_value |= TRST_BIT;
else if (trst == 1)
- output_value &= TRST_BIT;
+ output_value &=
~
TRST_BIT;
if (srst == 0)
output_value |= SRST_BIT;
else if (srst == 1)
if (srst == 0)
output_value |= SRST_BIT;
else if (srst == 1)
- output_value &= SRST_BIT;
+ output_value &=
~
SRST_BIT;
*gpio_data_register = output_value;
*gpio_data_register = output_value;
- nanosleep(
ep93xx_zzzz
);
+ nanosleep(
&ep93xx_zzzz, NULL
);
}
}
-int ep93xx_speed(int speed)
+
static
int ep93xx_speed(int speed)
{
{
-
+
return ERROR_OK;
}
return ERROR_OK;
}
-int ep93xx_register_commands(struct command_context_s *cmd_ctx)
+
static
int ep93xx_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
{
return ERROR_OK;
@@
-157,7
+157,7
@@
static int set_gonk_mode(void)
return ERROR_OK;
}
return ERROR_OK;
}
-int ep93xx_init(void)
+
static
int ep93xx_init(void)
{
int ret;
{
int ret;
@@
-210,8
+210,8
@@
int ep93xx_init(void)
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
-
printf
("gpio_data_register = %p\n", gpio_data_register);
-
printf
("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
+
LOG_INFO
("gpio_data_register = %p\n", gpio_data_register);
+
LOG_INFO
("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
@@
-219,7
+219,7
@@
int ep93xx_init(void)
*/
output_value = TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
*gpio_data_register = output_value;
*/
output_value = TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
*gpio_data_register = output_value;
- nanosleep(
ep93xx_zzzz
);
+ nanosleep(
&ep93xx_zzzz, NULL
);
/*
* Configure the direction register. 1 = output, 0 = input.
/*
* Configure the direction register. 1 = output, 0 = input.
@@
-227,11
+227,11
@@
int ep93xx_init(void)
*gpio_data_direction_register =
TDI_BIT | TCK_BIT | TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
*gpio_data_direction_register =
TDI_BIT | TCK_BIT | TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
- nanosleep(
ep93xx_zzzz
);
+ nanosleep(
&ep93xx_zzzz, NULL
);
return ERROR_OK;
}
return ERROR_OK;
}
-int ep93xx_quit(void)
+
static
int ep93xx_quit(void)
{
return ERROR_OK;
{
return ERROR_OK;