- // Mark this sym as not having registers assigned.
- bitVectUnSetBit(_G.regAssigned, sym->key);
-
- // Free the registers.
- _freeReg(sym->regs[0]);
-
- // If deallocating will free up enough registers for this iCode
- // then steal them immediatly.
- if (IC_RESULT(ic) && !_doesntNeedRegs(ic)) {
- result = OP_SYMBOL(IC_RESULT(ic));
- if (result && // Has a result
- result->liveTo > ic->seq && // and lives past this instruction
- result->liveTo <= ebp->lSeq && // and doesnt go past this block
- result->nRegs && // and actually needs registers
- !result->isspilt && // and doesnt have them yet
- !result->remat && // and wouldnt waste them
- !bitVectBitValue(_G.regAssigned, result->key) && // doesnt have them yet
- !_willCauseSpill(result->nRegs)
- ) {
- result->regs[0] = _allocateReg(result->nRegs);
+ // Mark this sym as not having registers assigned.
+ bitVectUnSetBit (_G.regAssigned, sym->key);
+
+ // Free the registers.
+ _freeReg (sym->regs[0]);
+
+ // If deallocating will free up enough registers for this iCode
+ // then steal them immediatly.
+ if (IC_RESULT (ic) && !_doesntNeedRegs (ic))
+ {
+ result = OP_SYMBOL (IC_RESULT (ic));
+ if (result && // Has a result
+ result->liveTo > ic->seq && // and lives past this instruction
+ result->liveTo <= ebp->lSeq && // and doesnt go past this block
+ result->nRegs && // and actually needs registers
+ !result->isspilt && // and doesnt have them yet
+ !result->remat && // and wouldnt waste them
+ !bitVectBitValue (_G.regAssigned, result->key) && // doesnt have them yet
+ !_willCauseSpill (result->nRegs)
+ )
+ {
+ result->regs[0] = _allocateReg (result->nRegs);