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* sim/ucsim/hc08.src/inst.cc,
[fw/sdcc]
/
src
/
hc08
/
gen.c
diff --git
a/src/hc08/gen.c
b/src/hc08/gen.c
index fde9e310f45178a5c44da5cb522946045cc97543..9c94f3559b73891c3037ce99b0dc5e295720476e 100644
(file)
--- a/
src/hc08/gen.c
+++ b/
src/hc08/gen.c
@@
-1920,7
+1920,7
@@
aopAdrStr (asmop * aop, int loffset, bool bit16)
case AOP_LIT:
if (bit16)
case AOP_LIT:
if (bit16)
- return aopLiteralLong (aop->aopu.aop_lit,
loffset
, 2);
+ return aopLiteralLong (aop->aopu.aop_lit,
/*loffset*/ 0
, 2);
else
return aopLiteral (aop->aopu.aop_lit, loffset);
else
return aopLiteral (aop->aopu.aop_lit, loffset);
@@
-5374,7
+5374,7
@@
XAccRsh (int shCount, bool sign)
** rola 1 1 bcde fgh0 0000 000a 0
** lslx 1 1 cdef gh00 0000 000a b
** rola 1 1 cdef gh00 0000 00ab 0
** rola 1 1 bcde fgh0 0000 000a 0
** lslx 1 1 cdef gh00 0000 000a b
** rola 1 1 cdef gh00 0000 00ab 0
- ** clrx 1 1 0000 0000 0000 00
0a
0
+ ** clrx 1 1 0000 0000 0000 00
ab
0
** total: 6 cycles, 6 bytes
*/
loadRegFromConst (hc08_reg_x, zero);
** total: 6 cycles, 6 bytes
*/
loadRegFromConst (hc08_reg_x, zero);
@@
-5430,12
+5430,12
@@
XAccRsh (int shCount, bool sign)
;
}
;
}
- /* ls
lx/rol
a is only 2 cycles and bytes, so an unrolled loop is often */
+ /* ls
rx/ror
a is only 2 cycles and bytes, so an unrolled loop is often */
/* the fastest and shortest. */
for (i=0;i<shCount;i++)
{
/* the fastest and shortest. */
for (i=0;i<shCount;i++)
{
- rmwWithReg ("ls
l
", hc08_reg_x);
- rmwWithReg ("ro
l
", hc08_reg_a);
+ rmwWithReg ("ls
r
", hc08_reg_x);
+ rmwWithReg ("ro
r
", hc08_reg_a);
}
}
}
}