+static int stm32l4_perform_obl_launch(struct flash_bank *bank)
+{
+ int retval, retval2;
+
+ retval = stm32l4_unlock_reg(bank);
+ if (retval != ERROR_OK)
+ goto err_lock;
+
+ retval = stm32l4_unlock_option_reg(bank);
+ if (retval != ERROR_OK)
+ goto err_lock;
+
+ /* Set OBL_LAUNCH bit in CR -> system reset and option bytes reload,
+ * but the RMs explicitly do *NOT* list this as power-on reset cause, and:
+ * "Note: If the read protection is set while the debugger is still
+ * connected through JTAG/SWD, apply a POR (power-on reset) instead of a system reset."
+ */
+
+ /* "Setting OBL_LAUNCH generates a reset so the option byte loading is performed under system reset" */
+ /* Due to this reset ST-Link reports an SWD_DP_ERROR, despite the write was successful,
+ * then just ignore the returned value */
+ stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_OBL_LAUNCH);
+
+ /* Need to re-probe after change */
+ struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
+ stm32l4_info->probed = false;
+
+err_lock:
+ retval2 = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_LOCK | FLASH_OPTLOCK);
+
+ if (retval != ERROR_OK)
+ return retval;
+
+ return retval2;
+}
+