- uint16_t addr;
-
- addr = ((uint16_t)(ao_intflash + pos) >> 1);
-
- ao_dma_set_transfer(ao_intflash_dma, d, &X_FWDATA,
- DMA_LEN_HIGH_VLEN_LEN | len,
- DMA_CFG0_WORDSIZE_8 | DMA_CFG0_TMODE_SINGLE |
- DMA_CFG0_TRIGGER_FLASH,
- DMA_CFG1_SRCINC_1 | DMA_CFG1_DESTINC_0 |
- DMA_CFG1_IRQMASK | DMA_CFG1_PRIORITY_HIGH);
-
- while (FCTL & FCTL_BUSY)
- ;
-
- FWT = 0x1F; // 21000 * f / 16e9 ; f = system freq = 24MHz
-
- FADDRH = addr >> 8;
- FADDRL = addr & ~0xFF00;
+ pos = ((uint16_t) ao_intflash + pos) >> 1;
+
+ ao_dma_set_transfer(ao_intflash_dma,
+ d,
+ &FWDATAXADDR,
+ len,
+ DMA_CFG0_WORDSIZE_8 |
+ DMA_CFG0_TMODE_SINGLE |
+ DMA_CFG0_TRIGGER_FLASH,
+ DMA_CFG1_SRCINC_1 |
+ DMA_CFG1_DESTINC_0 |
+ DMA_CFG1_PRIORITY_HIGH);
+
+ FADDRH = pos >> 8;
+ FADDRL = pos;