projects
/
fw
/
sdcc
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Fixed bug #2488074
[fw/sdcc]
/
sim
/
ucsim
/
z80.src
/
inst_ed.cc
diff --git
a/sim/ucsim/z80.src/inst_ed.cc
b/sim/ucsim/z80.src/inst_ed.cc
index a91524f8b0a10e4dd7855279277d56ce63122207..06874605c9feb91338decd055526c7c865c34a5b 100644
(file)
--- a/
sim/ucsim/z80.src/inst_ed.cc
+++ b/
sim/ucsim/z80.src/inst_ed.cc
@@
-271,18
+271,24
@@
cl_z80::inst_ed(void)
return(resGO);
case 0xB1: // CPIR
return(resGO);
case 0xB1: // CPIR
-/* fixme: checkme, compare to other emul. */
// compare acc with mem(HL), if ACC=0 set Z flag. Incr HL, decr BC.
// compare acc with mem(HL), if ACC=0 set Z flag. Incr HL, decr BC.
- regs.F &= ~(BIT_
ALL
); /* clear these */
- regs.F |= BIT_N
| BIT_P
;
+ regs.F &= ~(BIT_
P | BIT_A | BIT_Z | BIT_S
); /* clear these */
+ regs.F |= BIT_N;
do {
do {
- if ((regs.A - get1(regs.HL)) == 0) {
- regs.F |= (BIT_Z | BIT_P);
- return(resGO);
- }
+ if((regs.A - get1(regs.HL)) == 0)
+ regs.F |= BIT_Z;
+ else
+ regs.F &= ~BIT_Z;
+ if((regs.A - get1(regs.HL)) & 0x80)
+ regs.F |= BIT_S;
+ else
+ regs.F &= ~BIT_S;
+/* fixme: set BIT_A correctly. */
++regs.HL;
--regs.BC;
++regs.HL;
--regs.BC;
- } while (regs.BC != 0);
+ } while (regs.BC != 0 && (regs.F & BIT_Z) == 0);
+ if(regs.BC != 0)
+ regs.F |= BIT_P;
return(resGO);
#if 0
return(resGO);
#if 0