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added a few opcodes
[fw/sdcc]
/
sim
/
ucsim
/
xa.src
/
glob.h
diff --git
a/sim/ucsim/xa.src/glob.h
b/sim/ucsim/xa.src/glob.h
index 16b9e3f793239e2526141e9dd7c39306ad58b339..7a63c42c53eefb029f32971298862db0331dfca9 100644
(file)
--- a/
sim/ucsim/xa.src/glob.h
+++ b/
sim/ucsim/xa.src/glob.h
@@
-32,19
+32,7
@@
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
#include "stypes.h"
#include "stypes.h"
-
-#if 0
-enum {
- REG,
- IND_REG,
- IND_REG_PLUS,
- IND_REG_OFFSET,
- DIRECT,
- DATA8,
- DATA16
-};
-#endif
-
+/* this needs to match char *op_mnemonic_str[] definition in glob.cc */
enum {
BAD_OPCODE=0,
ADD,
enum {
BAD_OPCODE=0,
ADD,
@@
-79,19
+67,36
@@
MOVS,
MOVC,
MOVX,
PUSH,
MOVC,
MOVX,
PUSH,
+PUSHU,
POP,
POP,
+POPU,
XCH,
SETB,
CLR,
MOV,
ANL,
ORL,
XCH,
SETB,
CLR,
MOV,
ANL,
ORL,
-BR,
JMP,
CALL,
RET,
JMP,
CALL,
RET,
-Bcc,
+RETI,
+BCC,
+BCS,
+BEQ,
+BG,
+BGE,
+BGT,
+BL,
+BLE,
+BLT,
+BMI,
+BNE,
+BNV,
+BOV,
+BPL,
+BR,
JB,
JB,
+JBC,
JNB,
CJNE,
DJNZ,
JNB,
CJNE,
DJNZ,
@@
-103,12
+108,17
@@
TRAP,
RESET,
FCALL,
FJMP,
RESET,
FCALL,
FJMP,
+IREG,
};
extern char *op_mnemonic_str[];
};
extern char *op_mnemonic_str[];
+/* this classifies the operands and is used in the dissassembly
+ to print the operands. Its also used in the simulation to characterize
+ the op-code function.
+ */
enum op_operands {
enum op_operands {
- // the repeating
common parameter encoding for ADD, ADDC, SUB, AND
...
+ // the repeating
parameter encoding for ADD, ADDC, SUB, SUBB, AND, XOR,
...
REG_REG ,
REG_IREG ,
IREG_REG ,
REG_REG ,
REG_IREG ,
IREG_REG ,
@@
-136,7
+146,7
@@
enum op_operands {
// odd-ball ones
NO_OPERANDS, // for NOP
C_BIT,
// odd-ball ones
NO_OPERANDS, // for NOP
C_BIT,
-
NOTC_
BIT,
+
C_NOT
BIT,
REG_DATA4,
IREG_DATA4,
IREGINC_DATA4,
REG_DATA4,
IREG_DATA4,
IREGINC_DATA4,
@@
-145,9
+155,17
@@
enum op_operands {
DIRECT_DATA4,
REG_ALONE,
DIRECT_DATA4,
REG_ALONE,
+ IREG_ALONE,
+ BIT_ALONE,
+ BIT_REL8,
+ DIRECT_ALONE,
+ RLIST,
ADDR24,
REG_REL8,
ADDR24,
REG_REL8,
- DIRECT_REL8
+ DIRECT_REL8,
+
+ REL8,
+ REL16
};
// table of dissassembled instructions
};
// table of dissassembled instructions
@@
-156,8
+174,6
@@
struct xa_dis_entry
uint code, mask;
char branch;
uchar length;
uint code, mask;
char branch;
uchar length;
-// enum op_mnemonic mnemonic;
-// enum op_operands operands;
int mnemonic;
int operands;
};
int mnemonic;
int operands;
};