- sfr->set_bit1(TCON, bmIE1);
- }
- prev_p3= p3 & port_pins[3];
- prev_p1= p3 & port_pins[1];
-}
-
-
-/*
- * Setting up parity flag
- */
-
-void
-t_uc51::set_p_flag(void)
-{
- bool p;
- int i;
- uchar uc;
-
- p = DD_FALSE;
- uc= sfr->get(ACC);
- for (i= 0; i < 8; i++)
- {
- if (uc & 1)
- p= !p;
- uc>>= 1;
- }
- SET_BIT(p, PSW, bmP);
-}
-
-/*
- * Simulating hardware elements
- */
-
-int
-t_uc51::do_hardware(int cycles)
-{
- int res;
-
- if ((res= do_timers(cycles)) != resGO)
- return(res);
- if ((res= do_serial(cycles)) != resGO)
- return(res);
- return(do_wdt(cycles));
-}
-
-
-/*
- *
- */
-
-int
-t_uc51::serial_bit_cnt(int mode)
-{
- int /*mode,*/ divby= 12;
- int *tr_src= 0, *rec_src= 0;
-
- //mode= sfr->get(SCON) >> 6;
- switch (mode)
- {
- case 0:
- divby = 12;
- tr_src = &s_tr_tick;
- rec_src= &s_rec_tick;
- break;
- case 1:
- case 3:
- divby = (sfr->get(PCON)&bmSMOD)?16:32;
- tr_src = &s_tr_t1;
- rec_src= &s_rec_t1;
- break;
- case 2:
- divby = (sfr->get(PCON)&bmSMOD)?16:32;
- tr_src = &s_tr_tick;
- rec_src= &s_rec_tick;
- break;
- }
- if (s_sending)
- {
- while (*tr_src >= divby)
- {
- (*tr_src)-= divby;
- s_tr_bit++;
- }
- }
- if (s_receiving)
- {
- while (*rec_src >= divby)
- {
- (*rec_src)-= divby;
- s_rec_bit++;
- }
- }
- return(0);
-}
-
-
-/*
- * Simulating serial line
- */
-
-int
-t_uc51::do_serial(int cycles)
-{
- int mode, bits= 8;
- char c;
- uint scon= sfr->get(SCON);
-
- mode= scon >> 6;
- switch (mode)
- {
- case 0:
- bits= 8;
- break;
- case 1:
- bits= 10;
- break;
- case 2:
- case 3:
- bits= 11;
- break;
- }
- serial_bit_cnt(mode);
- if (s_sending &&
- (s_tr_bit >= bits))
- {
- s_sending= DD_FALSE;
- sfr->set_bit1(SCON, bmTI);
- if (serial_out)
- {
- putc(s_out, serial_out);
- fflush(serial_out);
- }
- s_tr_bit-= bits;
- }
- if ((scon & bmREN) &&
- serial_in &&
- !s_receiving)
- {
- fd_set set; static struct timeval timeout= {0,0};
- FD_ZERO(&set);
- FD_SET(fileno(serial_in), &set);
- int i= select(fileno(serial_in)+1, &set, NULL, NULL, &timeout);
- if (i > 0 &&
- FD_ISSET(fileno(serial_in), &set))
- {
- s_receiving= DD_TRUE;
- s_rec_bit= 0;
- s_rec_tick= s_rec_t1= 0;
- }
- }
- if (s_receiving &&
- (s_rec_bit >= bits))
- {
- if (::read(fileno(serial_in), &c, 1) == 1)
- {
- s_in= c;
- sfr->set(SBUF, s_in);
- received(c);
- }
- s_receiving= DD_FALSE;
- s_rec_bit-= bits;
- }
- return(resGO);
-}
-
-void
-t_uc51::received(int c)
-{
- sfr->set_bit1(SCON, bmRI);
-}
-
-
-/*
- * Simulating timers
- */
-
-int
-t_uc51::do_timers(int cycles)
-{
- int res;
-
- if ((res= do_timer0(cycles)) != resGO)
- return(res);
- return(do_timer1(cycles));
-}
-
-
-/*
- * Simulating timer 0
- */
-
-int
-t_uc51::do_timer0(int cycles)
-{
- uint tmod= sfr->get(TMOD);
- uint tcon= sfr->get(TCON);
- uint p3= sfr->get(P3);
-
- if (((tmod & bmGATE0) &&
- (p3 & port_pins[3] & bm_INT0)) ||
- (tcon & bmTR0))
- {
- if (!(tmod & bmC_T0) ||
- ((prev_p3 & bmT0) &&
- !(p3 & port_pins[3] & bmT0)))
- {
- if (!(tmod & bmM00) &&
- !(tmod & bmM10))
- {
- if (tmod & bmC_T0)
- cycles= 1;
- while (cycles--)
- {
- // mod 0, TH= 8 bit t/c, TL= 5 bit precounter
- //(MEM(MEM_SFR)[TL0])++;
- sfr->add(TL0, 1);
- if ((sfr->get(TL0) & 0x1f) == 0)
- {
- //sfr->set_bit0(TL0, ~0x1f);
- sfr->set(TL0, 0);
- if (!/*++(MEM(MEM_SFR)[TH0])*/sfr->add(TH0, 1))
- {
- sfr->set_bit1(TCON, bmTF0);
- t0_overflow();
- }
- }
- }
- }
- else if ((tmod & bmM00) &&
- !(tmod & bmM10))
- {
- if (tmod & bmC_T0)
- cycles= 1;
- while (cycles--)
- {
- // mod 1 TH+TL= 16 bit t/c
- if (!/*++(MEM(MEM_SFR)[TL0])*/sfr->add(TL0, 1))
- {
- if (!/*++(MEM(MEM_SFR)[TH0])*/sfr->add(TH0, 1))
- {
- sfr->set_bit1(TCON, bmTF0);
- t0_overflow();
- }
- }
- }
- }
- else if (!(tmod & bmM00) &&
- (tmod & bmM10))
- {
- if (tmod & bmC_T0)
- cycles= 1;
- while (cycles--)
- {
- // mod 2 TL= 8 bit t/c auto reload from TH
- if (!/*++(MEM(MEM_SFR)[TL0])*/sfr->add(TL0, 1))
- {
- sfr->set(TL0, sfr->get(TH0));
- sfr->set_bit1(TCON, bmTF0);
- t0_overflow();
- }
- }
- }
- else
- {
- // mod 3 TL= 8 bit t/c
- // TH= 8 bit timer controlled with T1's bits
- if (!/*++(MEM(MEM_SFR)[TL0])*/sfr->add(TL0, 1))
- {
- sfr->set_bit1(TCON, bmTF0);
- t0_overflow();
- }
- }
- }
- }
- if ((tmod & bmM00) &&
- (tmod & bmM10))
- {
- if (((tmod & bmGATE1) &&
- (p3 & port_pins[3] & bm_INT1)) ||
- (tcon & bmTR1))
- {
- if (!/*++(MEM(MEM_SFR)[TH0])*/sfr->add(TH0, 1))
- {
- sfr->set_bit1(TCON, bmTF1);
- s_tr_t1++;
- s_rec_t1++;
- t0_overflow();
- }
- }
- }
- return(resGO);
-}
-
-/*
- * Called every time when T0 overflows
- */
-
-int
-t_uc51::t0_overflow(void)
-{
- return(0);
-}
-
-
-/*
- * Simulating timer 1
- */
-
-int
-t_uc51::do_timer1(int cycles)
-{
- uint tmod= sfr->get(TMOD);
- uint tcon= sfr->get(TCON);
- uint p3= sfr->get(P3);
-
- if (((tmod & bmGATE1) &&
- (p3 & port_pins[3] & bm_INT1)) ||
- (tcon & bmTR1))
- {
- if (!(tmod & bmC_T1) ||
- ((prev_p3 & bmT1) &&
- !(p3 & port_pins[3] & bmT1)))
- {
- if (!(tmod & bmM01) &&
- !(tmod & bmM11))
- {
- if (tmod & bmC_T0)
- cycles= 1;
- while (cycles--)
- {
- // mod 0, TH= 8 bit t/c, TL= 5 bit precounter
- if (/*++(MEM(MEM_SFR)[TL1])*/(sfr->add(TL1, 1) & 0x1f) == 0)
- {
- //sfr->set_bit0(TL1, ~0x1f);
- sfr->set(TL1, 0);
- if (!/*++(MEM(MEM_SFR)[TH1])*/sfr->add(TH1, 1))
- {
- sfr->set_bit1(TCON, bmTF1);
- s_tr_t1++;
- s_rec_t1++;
- }
- }
- }
- }
- else if ((tmod & bmM01) &&
- !(tmod & bmM11))
- {
- if (tmod & bmC_T0)
- cycles= 1;
- while (cycles--)
- {
- // mod 1 TH+TL= 16 bit t/c
- if (!/*++(MEM(MEM_SFR)[TL1])*/sfr->add(TL1, 1))
- if (!/*++(MEM(MEM_SFR)[TH1])*/sfr->add(TH1, 1))
- {
- sfr->set_bit1(TCON, bmTF1);
- s_tr_t1++;
- s_rec_t1++;
- }
- }
- }
- else if (!(tmod & bmM01) &&
- (tmod & bmM11))
- {
- if (tmod & bmC_T1)
- cycles= 1;
- while (cycles--)
- {
- // mod 2 TL= 8 bit t/c auto reload from TH
- if (!/*++(MEM(MEM_SFR)[TL1])*/sfr->add(TL1, 1))
- {
- sfr->set(TL1, sfr->get(TH1));
- sfr->set_bit1(TCON, bmTF1);
- s_tr_t1++;
- s_rec_t1++;
- }
- }
- }
- else
- // mod 3 stop
- ;
- }
- }
- return(resGO);
-}