+cl_timer2::write(class cl_memory_cell *cell, t_mem *val)
+{
+ int oldmode= mode;
+ bool oldtr= TR;
+
+ if (exf2it)
+ exf2it->activate();
+ if (cell == cell_tcon)
+ {
+ C_T = *val & mask_C_T;
+ TR = *val & mask_TR;
+ RCLK= *val & mask_RCLK;
+ TCLK= *val & mask_TCLK;
+ CP_RL2= *val & mask_CP_RL2;
+ EXEN2 = *val & bmEXEN2;
+ if (!(RCLK || TCLK) &&
+ !CP_RL2)
+ mode= T2MODE_RELOAD;
+ else if (!(RCLK || TCLK) &&
+ CP_RL2)
+ mode= T2MODE_CAPTURE;
+ else if (RCLK || TCLK)
+ mode= T2MODE_BAUDRATE;
+ else
+ mode= T2MODE_OFF;
+ if (mode != oldmode)
+ inform_partners(EV_T2_MODE_CHANGED, val);
+ }
+ else if (cell == cell_t2mod)
+ {
+ bit_dcen= (*val & bmDCEN) != 0;
+ bit_t2oe= (*val & bmT2OE) != 0;
+ if ((features & t2_down) &&
+ bit_dcen &&
+ mode == T2MODE_RELOAD)
+ {
+ mode= T2MODE_DOWN;
+ if (exf2it)
+ exf2it->deactivate();
+ }
+ if ((features & t2_clock_out) &&
+ bit_t2oe)
+ mode= T2MODE_CLKOUT;
+ }
+ if (mode != oldmode ||
+ TR && !oldtr ||
+ !TR && oldtr)
+ T_edge= t2ex_edge= 0;
+}
+
+int
+cl_timer2::tick(int cycles)
+{
+ switch (mode)
+ {
+ case T2MODE_BAUDRATE:
+ do_t2_baud(cycles);
+ break;
+ case T2MODE_CAPTURE:
+ do_t2_capture(cycles);
+ break;
+ case T2MODE_RELOAD:
+ do_t2_reload(cycles);
+ break;
+ case T2MODE_DOWN:
+ do_t2_down(cycles);
+ break;
+ case T2MODE_CLKOUT:
+ do_t2_clock_out(cycles);
+ break;
+ default: break;
+ }
+
+ return(resGO);
+}
+
+/*
+ * Baud rate generator mode of Timer #2
+ */
+
+int
+cl_timer2::do_t2_baud(int cycles)
+{
+ if (EXEN2 && t2ex_edge)
+ {
+ cell_tcon->set_bit1(bmEXF2);
+ t2ex_edge= 0;
+ }
+
+ if (!TR)
+ return(0);
+
+ if (C_T)
+ (cycles= T_edge), T_edge= 0;
+ else
+ cycles*= 6;
+
+ while (cycles--)
+ {
+ if (!cell_tl->add(1))
+ if (!cell_th->add(1))
+ {
+ cell_th->set(cell_rcap2h->get());
+ cell_tl->set(cell_rcap2l->get());
+ inform_partners(EV_OVERFLOW, 0);
+ }
+ }
+ return(resGO);
+}
+
+
+/*
+ * Capture function of Timer #2
+ */
+
+void
+cl_timer2::do_t2_capture(int cycles)
+{
+ if (EXEN2 && t2ex_edge)
+ {
+ cell_tcon->set_bit1(bmEXF2);
+ cell_rcap2h->set(cell_th->get());
+ cell_rcap2l->set(cell_tl->get());
+ t2ex_edge= 0;
+ }
+
+ if (!TR)
+ return;
+
+ if (C_T)
+ (cycles= T_edge), T_edge= 0;
+
+ if (!cell_tl->add(1))
+ {
+ if (!cell_th->add(1))
+ cell_tcon->set_bit1(bmTF2);
+ }
+}
+
+
+/*
+ * Auto Reload mode of Timer #2, counting UP
+ */
+
+void
+cl_timer2::do_t2_reload(int cycles)
+{
+ if (EXEN2 && t2ex_edge)
+ {
+ cell_tcon->set_bit1(bmEXF2);
+ cell_th->set(cell_rcap2h->get());
+ cell_tl->set(cell_rcap2l->get());
+ t2ex_edge= 0;
+ }
+
+ if (!TR)
+ return;
+
+ if (C_T)
+ (cycles= T_edge), T_edge= 0;
+
+ if (!cell_tl->add(1))
+ {
+ if (!cell_th->add(1))
+ {
+ cell_tcon->set_bit1(mask_TF);
+ cell_th->set(cell_rcap2h->get());
+ cell_tl->set(cell_rcap2l->get());
+ }
+ }
+}
+
+void
+cl_timer2::do_t2_down(int cycles)
+{
+ bool toggle= DD_FALSE;
+
+ if (!TR)
+ return;
+
+ if (C_T)
+ (cycles= T_edge), T_edge= 0;
+
+ if (bit_t2ex)
+ // UP
+ while (cycles--)
+ if (!cell_tl->add(1))
+ {
+ if (!cell_th->add(1))
+ {
+ cell_tcon->set_bit1(mask_TF);
+ cell_th->set(cell_rcap2h->get());
+ cell_tl->set(cell_rcap2l->get());
+ toggle= DD_TRUE;
+ }
+ }
+ else
+ // DOWN
+ while (cycles--)
+ {
+ t_mem l, h;
+ if ((l= cell_tl->add(-1)) == 0xff)
+ h= cell_th->add(-1);
+ else
+ h= cell_th->get();
+ if ((TYPE_UWORD)(h*256+l) <
+ (TYPE_UWORD)(cell_rcap2h->get()*256+cell_rcap2l->get()))
+ {
+ cell_tcon->set_bit1(mask_TF);
+ cell_th->set(0xff);
+ cell_tl->set(0xff);
+ toggle= DD_TRUE;
+ }
+ }
+ if (toggle &&
+ sfr)
+ {
+ class cl_memory_cell *p1= sfr->get_cell(P1);
+ if (p1)
+ p1->set(p1->get() ^ bmEXF2);
+ }
+}
+
+void
+cl_timer2::do_t2_clock_out(int cycles)
+{
+ if (EXEN2 && t2ex_edge)
+ {
+ cell_tcon->set_bit1(bmEXF2);
+ t2ex_edge= 0;
+ }
+
+ if (!TR)
+ return;
+
+ if (C_T)
+ (cycles= T_edge), T_edge= 0;
+ else
+ cycles*= 6;
+
+ while (cycles--)
+ {
+ if (!cell_tl->add(1))
+ if (!cell_th->add(1))
+ {
+ cell_th->set(cell_rcap2h->get());
+ cell_tl->set(cell_rcap2l->get());
+ inform_partners(EV_OVERFLOW, 0);
+ if (!C_T &&
+ sfr)
+ {
+ // toggle T2 on P1
+ class cl_memory_cell *p1= sfr->get_cell(P1);
+ if (p1)
+ p1->set(p1->get() ^ bmT2);
+ }
+ }
+ }
+}
+
+void
+cl_timer2::happen(class cl_hw *where, enum hw_event he, void *params)
+{
+ struct ev_port_changed *ep= (struct ev_port_changed *)params;
+
+ if (where->cathegory == HW_PORT &&
+ he == EV_PORT_CHANGED &&
+ ep->id == 1)
+ {
+ t_mem p1n= ep->new_pins & ep->new_value;
+ t_mem p1o= ep->pins & ep->prev_value;
+ if (!(p1n & mask_T) &&
+ (p1o & mask_T))
+ T_edge++;
+ if (!(p1n & bmT2EX) &&
+ (p1o & bmT2EX))
+ t2ex_edge++;
+ bit_t2ex= p1n & bmT2EX;
+ }
+}
+
+void
+cl_timer2::print_info(class cl_console_base *con)