+extern __sfr __at (0xfcb) PR2;
+extern __sfr __at (0xfcc) TMR2;
+extern __sfr __at (0xfcd) T1CON;
+typedef union {
+ struct {
+ unsigned TMR1ON:1;
+ unsigned TMR1CS:1;
+ unsigned NOT_T1SYNC:1;
+ unsigned T1OSCEN:1;
+ unsigned T1CKPS0:1;
+ unsigned T1CKPS1:1;
+ unsigned :1;
+ unsigned RD16:1;
+ };
+} __T1CONbits_t;
+
+extern volatile __T1CONbits_t __at (0xfcd) T1CONbits;
+
+extern __sfr __at (0xfce) TMR1L;
+extern __sfr __at (0xfcf) TMR1H;
+extern __sfr __at (0xfd0) RCON;
+typedef union {
+ struct {
+ unsigned BOR:1;
+ unsigned POR:1;
+ unsigned PD:1;
+ unsigned TO:1;
+ unsigned RI:1;
+ unsigned :1;
+ unsigned :1;
+ unsigned IPEN:1;
+ };
+} __RCONbits_t;
+
+extern volatile __RCONbits_t __at (0xfd0) RCONbits;
+
+extern __sfr __at (0xfd1) WDTCON;
+typedef union {
+ struct {
+ unsigned SWDTEN:1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ };
+
+ struct {
+ unsigned SWDTE:1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ };
+} __WDTCONbits_t;
+
+extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits;
+
+extern __sfr __at (0xfd2) LVDCON;
+typedef union {
+ struct {
+ unsigned LVDL0:1;
+ unsigned LVDL1:1;
+ unsigned LVDL2:1;
+ unsigned LVDL3:1;
+ unsigned LVDEN:1;
+ unsigned VRST:1;
+ unsigned :1;
+ unsigned :1;
+ };
+
+ struct {
+ unsigned LVV0:1;
+ unsigned LVV1:1;
+ unsigned LVV2:1;
+ unsigned LVV3:1;
+ unsigned :1;
+ unsigned BGST:1;
+ unsigned :1;
+ unsigned :1;
+ };
+} __LVDCONbits_t;
+
+extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits;
+
+extern __sfr __at (0xfd3) OSCCON;
+typedef union {
+ struct {
+ unsigned SCS:1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ };
+} __OSCCONbits_t;
+
+extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits;
+
+extern __sfr __at (0xfd5) T0CON;
+typedef union {
+ struct {
+ unsigned T0PS0:1;
+ unsigned T0PS1:1;
+ unsigned T0PS2:1;
+ unsigned PSA:1;
+ unsigned T0SE:1;
+ unsigned T0CS:1;
+ unsigned T08BIT:1;
+ unsigned TMR0ON:1;
+ };
+} __T0CONbits_t;
+
+extern volatile __T0CONbits_t __at (0xfd5) T0CONbits;
+
+extern __sfr __at (0xfd6) TMR0L;
+extern __sfr __at (0xfd7) TMR0H;
+extern __sfr __at (0xfd8) STATUS;
+typedef union {
+ struct {
+ unsigned C:1;
+ unsigned DC:1;
+ unsigned Z:1;
+ unsigned OV:1;
+ unsigned N:1;
+ unsigned :1;
+ unsigned :1;
+ unsigned :1;
+ };
+} __STATUSbits_t;
+
+extern volatile __STATUSbits_t __at (0xfd8) STATUSbits;
+
+extern __sfr __at (0xfd9) FSR2L;
+extern __sfr __at (0xfda) FSR2H;
+extern __sfr __at (0xfdb) PLUSW2;
+extern __sfr __at (0xfdc) PREINC2;
+extern __sfr __at (0xfdd) POSTDEC2;
+extern __sfr __at (0xfde) POSTINC2;
+extern __sfr __at (0xfdf) INDF2;
+extern __sfr __at (0xfe0) BSR;
+extern __sfr __at (0xfe1) FSR1L;
+extern __sfr __at (0xfe2) FSR1H;
+extern __sfr __at (0xfe3) PLUSW1;
+extern __sfr __at (0xfe4) PREINC1;
+extern __sfr __at (0xfe5) POSTDEC1;
+extern __sfr __at (0xfe6) POSTINC1;
+extern __sfr __at (0xfe7) INDF1;
+extern __sfr __at (0xfe8) WREG;
+extern __sfr __at (0xfe9) FSR0L;
+extern __sfr __at (0xfea) FSR0H;
+extern __sfr __at (0xfeb) PLUSW0;
+extern __sfr __at (0xfec) PREINC0;
+extern __sfr __at (0xfed) POSTDEC0;
+extern __sfr __at (0xfee) POSTINC0;
+extern __sfr __at (0xfef) INDF0;
+extern __sfr __at (0xff0) INTCON3;
+typedef union {
+ struct {
+ unsigned INT1F:1;
+ unsigned INT2F:1;
+ unsigned :1;
+ unsigned INT1E:1;
+ unsigned INT2E:1;
+ unsigned :1;
+ unsigned INT1P:1;
+ unsigned INT2P:1;
+ };
+
+ struct {
+ unsigned INT1IF:1;
+ unsigned INT2IF:1;
+ unsigned :1;
+ unsigned INT1IE:1;
+ unsigned INT2IE:1;
+ unsigned :1;
+ unsigned INT1IP:1;
+ unsigned INT2IP:1;
+ };
+} __INTCON3bits_t;
+
+extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits;
+
+extern __sfr __at (0xff1) INTCON2;
+typedef union {
+ struct {
+ unsigned RBIP:1;
+ unsigned :1;
+ unsigned T0IP:1;
+ unsigned :1;
+ unsigned INTEDG2:1;
+ unsigned INTEDG1:1;
+ unsigned INTEDG0:1;
+ unsigned RBPU:1;
+ };
+} __INTCON2bits_t;
+
+extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits;
+
+extern __sfr __at (0xff2) INTCON;
+typedef union {
+ struct {
+ unsigned RBIF:1;
+ unsigned INT0F:1;
+ unsigned T0IF:1;
+ unsigned RBIE:1;
+ unsigned INT0E:1;
+ unsigned T0IE:1;
+ unsigned PEIE:1;
+ unsigned GIE:1;
+ };
+ struct {
+ unsigned :1;
+ unsigned INT0IF:1;
+ unsigned TMR0IF:1;
+ unsigned :1;
+ unsigned INT0IE:1;
+ unsigned TMR0IE:1;
+ unsigned GIEL:1;
+ unsigned GIEH:1;
+ };
+} __INTCONbits_t;
+
+extern volatile __INTCONbits_t __at (0xff2) INTCONbits;
+
+extern __sfr __at (0xff3) PRODL;
+extern __sfr __at (0xff4) PRODH;
+extern __sfr __at (0xff5) TABLAT;
+extern __sfr __at (0xff6) TBLPTRL;
+extern __sfr __at (0xff7) TBLPTRH;
+extern __sfr __at (0xff8) TBLPTRU;
+extern __sfr __at (0xff9) PCL;
+extern __sfr __at (0xffa) PCLATH;
+extern __sfr __at (0xffb) PCLATU;
+extern __sfr __at (0xffc) STKPTR;
+typedef union {
+ struct {
+ unsigned STKPTR0:1;
+ unsigned STKPTR1:1;
+ unsigned STKPTR2:1;
+ unsigned STKPTR3:1;
+ unsigned STKPTR4:1;
+ unsigned :1;
+ unsigned STKUNF:1;
+ unsigned STKFUL:1;
+ };
+} __STKPTRbits_t;
+
+extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits;
+
+extern __sfr __at (0xffd) TOSL;
+extern __sfr __at (0xffe) TOSH;
+extern __sfr __at (0xfff) TOSU;
+
+
+/* Configuration registers locations */
+#define __CONFIG1H 0x300001
+#define __CONFIG2L 0x300002
+#define __CONFIG2H 0x300003
+#define __CONFIG3H 0x300005
+#define __CONFIG4L 0x300006
+#define __CONFIG5L 0x300008
+#define __CONFIG5H 0x300009
+#define __CONFIG6L 0x30000A
+#define __CONFIG6H 0x30000B
+#define __CONFIG7L 0x30000C
+#define __CONFIG7H 0x30000D
+
+
+
+/* Oscillator 1H options */
+#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */
+#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */
+#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */
+#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */
+#define _OSC_RC_1H 0xFB /* RC */
+#define _OSC_HS_1H 0xFA /* HS */
+#define _OSC_XT_1H 0xF9 /* XT */
+#define _OSC_LP_1H 0xF8 /* LP */
+
+/* Osc. Switch Enable 1H options */
+#define _OSCS_OFF_1H 0xFF /* Disabled */
+#define _OSCS_ON_1H 0xDF /* Enabled */
+
+/* Power Up Timer 2L options */
+#define _PUT_OFF_2L 0xFF /* Disabled */
+#define _PUT_ON_2L 0xFE /* Enabled */
+
+/* Brown Out Detect 2L options */
+#define _BODEN_ON_2L 0xFF /* Enabled */
+#define _BODEN_OFF_2L 0xFD /* Disabled */
+
+/* Brown Out Voltage 2L options */
+#define _BODENV_2_0V_2L 0xFF /* 2.0V */
+#define _BODENV_2_7V_2L 0xFB /* 2.7V */
+#define _BODENV_4_2V_2L 0xF7 /* 4.2V */
+#define _BODENV_4_5V_2L 0xF3 /* 4.5V */
+
+/* Watchdog Timer 2H options */
+#define _WDT_ON_2H 0xFF /* Enabled */
+#define _WDT_OFF_2H 0xFE /* Disabled */
+
+/* Watchdog Postscaler 2H options */
+#define _WDTPS_1_128_2H 0xFF /* 1:128 */
+#define _WDTPS_1_64_2H 0xFD /* 1:64 */
+#define _WDTPS_1_32_2H 0xFB /* 1:32 */
+#define _WDTPS_1_16_2H 0xF9 /* 1:16 */
+#define _WDTPS_1_8_2H 0xF7 /* 1:8 */
+#define _WDTPS_1_4_2H 0xF5 /* 1:4 */
+#define _WDTPS_1_2_2H 0xF3 /* 1:2 */
+#define _WDTPS_1_1_2H 0xF1 /* 1:1 */
+
+/* CCP2 Mux 3H options */
+#define _CCP2MUX_RC1_3H 0xFF /* RC1 */
+#define _CCP2MUX_RB3_3H 0xFE /* RB3 */
+
+/* Low Voltage Program 4L options */
+#define _LVP_ON_4L 0xFF /* Enabled */
+#define _LVP_OFF_4L 0xFB /* Disabled */
+
+/* Background Debug 4L options */
+#define _BACKBUG_OFF_4L 0xFF /* Disabled */
+#define _BACKBUG_ON_4L 0x7F /* Enabled */
+
+/* Stack Overflow Reset 4L options */
+#define _STVR_ON_4L 0xFF /* Enabled */
+#define _STVR_OFF_4L 0xFE /* Disabled */
+
+/* Code Protect 00200-01FFF 5L options */
+#define _CP_0_OFF_5L 0xFF /* Disabled */
+#define _CP_0_ON_5L 0xFE /* Enabled */
+
+/* Code Protect 02000-03FFF 5L options */
+#define _CP_1_OFF_5L 0xFF /* Disabled */
+#define _CP_1_ON_5L 0xFD /* Enabled */
+
+/* Data EE Read Protect 5H options */
+#define _CPD_OFF_5H 0xFF /* Disabled */
+#define _CPD_ON_5H 0x7F /* Enabled */
+
+/* Code Protect Boot 5H options */
+#define _CPB_OFF_5H 0xFF /* Disabled */
+#define _CPB_ON_5H 0xBF /* Enabled */
+
+/* Table Write Protect 00200-01FFF 6L options */
+#define _WRT_0_OFF_6L 0xFF /* Disabled */
+#define _WRT_0_ON_6L 0xFE /* Enabled */
+
+/* Table Write Protect 02000-03FFF 6L options */
+#define _WRT_1_OFF_6L 0xFF /* Disabled */
+#define _WRT_1_ON_6L 0xFD /* Enabled */
+
+/* Data EE Write Protect 6H options */
+#define _WRTD_OFF_6H 0xFF /* Disabled */
+#define _WRTD_ON_6H 0x7F /* Enabled */
+
+/* Table Write Protect Boot 6H options */
+#define _WRTB_OFF_6H 0xFF /* Disabled */
+#define _WRTB_ON_6H 0xBF /* Enabled */
+
+/* Config. Write Protect 6H options */
+#define _WRTC_OFF_6H 0xFF /* Disabled */
+#define _WRTC_ON_6H 0xDF /* Enabled */
+
+/* Table Read Protect 00200-01FFF 7L options */
+#define _EBTR_0_OFF_7L 0xFF /* Disabled */
+#define _EBTR_0_ON_7L 0xFE /* Enabled */
+
+/* Table Read Protect 02000-03FFF 7L options */
+#define _EBTR_1_OFF_7L 0xFF /* Disabled */
+#define _EBTR_1_ON_7L 0xFD /* Enabled */
+
+/* Table Read Protect Boot 7H options */
+#define _EBTRB_OFF_7H 0xFF /* Disabled */
+#define _EBTRB_ON_7H 0xBF /* Enabled */
+
+
+/* Device ID locations */
+#define __IDLOC0 0x200000
+#define __IDLOC1 0x200001
+#define __IDLOC2 0x200002
+#define __IDLOC3 0x200003
+#define __IDLOC4 0x200004
+#define __IDLOC5 0x200005
+#define __IDLOC6 0x200006
+#define __IDLOC7 0x200007
+
+
+#endif