+#ifdef C0C
+#undef C0C
+sfr at 0xA3 C0C ; // DS80C390 specific
+// Not directly accessible bits
+#define SWINT 0x01
+#define ERCS 0x02
+#define AUTOB 0x04
+#define CRST 0x08
+#define SIESTA 0x10
+#define PDE 0x20
+#define STIE 0x40
+#define ERIE 0x80
+#endif
+
+#ifdef C0IR
+#undef C0IR
+sfr at 0xA5 C0IR ; // DS80C390 specific
+// Not directly accessible bits
+#define INTIN0 0x01
+#define INTIN1 0x02
+#define INTIN2 0x04
+#define INTIN3 0x08
+#define INTIN4 0x10
+#define INTIN5 0x20
+#define INTIN6 0x40
+#define INTIN7 0x80
+#endif
+
+#ifdef C0M1C
+#undef C0M1C
+sfr at 0xAB C0M1C ; // DS80C390 specific
+// Not directly accessible bits
+#define DTUP 0x01
+#define ROW_TIH 0x02
+#define MTRQ 0x04
+#define EXTRQ 0x08
+#define INTRQ 0x10
+#define ERI 0x20
+#define ETI 0x40
+#define MSRDY 0x80
+#endif
+
+#ifdef C0M2C
+#undef C0M2C
+sfr at 0xAC C0M2C ; // DS80C390 specific
+#endif
+
+#ifdef C0M3C
+#undef C0M3C
+sfr at 0xAD C0M3C ; // DS80C390 specific
+#endif
+
+#ifdef C0M4C
+#undef C0M4C
+sfr at 0xAE C0M4C ; // DS80C390 specific
+#endif
+
+#ifdef C0M5C
+#undef C0M5C
+sfr at 0xAF C0M5C ; // DS80C390 specific
+#endif
+
+#ifdef C0M6C
+#undef C0M6C
+sfr at 0xB3 C0M6C ; // DS80C390 specific
+#endif
+
+#ifdef C0M7C
+#undef C0M7C
+sfr at 0xB4 C0M7C ; // DS80C390 specific
+#endif
+
+#ifdef C0M8C
+#undef C0M8C
+sfr at 0xB5 C0M8C ; // DS80C390 specific
+#endif
+
+#ifdef C0M9C
+#undef C0M9C
+sfr at 0xB6 C0M9C ; // DS80C390 specific
+#endif
+
+#ifdef C0M10C
+#undef C0M10C
+sfr at 0xB7 C0M10C ; // DS80C390 specific
+#endif
+
+#ifdef C0M11C
+#undef C0M11C
+sfr at 0xBB C0M11C ; // DS80C390 specific
+#endif
+
+#ifdef C0M12C
+#undef C0M12C
+sfr at 0xBC C0M12C ; // DS80C390 specific
+#endif
+
+#ifdef C0M13C
+#undef C0M13C
+sfr at 0xBD C0M13C ; // DS80C390 specific
+#endif
+
+#ifdef C0M14C
+#undef C0M14C
+sfr at 0xBE C0M14C ; // DS80C390 specific
+#endif
+
+#ifdef C0M15C
+#undef C0M15C
+sfr at 0xBF C0M15C ; // DS80C390 specific
+#endif
+
+#ifdef C0RE
+#undef C0RE
+sfr at 0xA7 C0RE ; // DS80C390 specific
+#endif
+
+#ifdef C0RMS0
+#undef C0RMS0
+sfr at 0x96 C0RMS0 ; // DS80C390 specific
+#endif
+
+#ifdef C0RMS1
+#undef C0RMS1
+sfr at 0x97 C0RMS1 ; // DS80C390 specific
+#endif
+
+#ifdef C0S
+#undef C0S
+sfr at 0xA4 C0S ; // DS80C390 specific
+// Not directly accessible bits
+#define ER0 0x01
+#define ER1 0x02
+#define ER2 0x04
+#define TXS 0x08
+#define RXS 0x10
+#define WKS 0x20
+#define EC96_128 0x40
+#define BSS 0x80
+#endif
+
+#ifdef C0TE
+#undef C0TE
+sfr at 0xA6 C0TE ; // DS80C390 specific
+#endif
+
+#ifdef C0TMA0
+#undef C0TMA0
+sfr at 0x9E C0TMA0 ; // DS80C390 specific
+#endif
+
+#ifdef C0TMA1
+#undef C0TMA1
+sfr at 0x9F C0TMA1 ; // DS80C390 specific
+#endif
+
+#ifdef C1C
+#undef C1C
+sfr at 0xE3 C1C ; // DS80C390 specific
+// Not directly accessible bits
+#define SWINT 0x01
+#define ERCS 0x02
+#define AUTOB 0x04
+#define CRST 0x08
+#define SIESTA 0x10
+#define PDE 0x20
+#define STIE 0x40
+#define ERIE 0x80
+#endif
+
+#ifdef C1IR
+#undef C1IR
+sfr at 0xE5 C1IR ; // DS80C390 specific
+// Not directly accessible bits
+#define INTIN0 0x01
+#define INTIN1 0x02
+#define INTIN2 0x04
+#define INTIN3 0x08
+#define INTIN4 0x10
+#define INTIN5 0x20
+#define INTIN6 0x40
+#define INTIN7 0x80
+#endif
+
+#ifdef C1IRE
+#undef C1IRE
+sfr at 0xE7 C1RE ; // DS80C390 specific
+#endif
+
+#ifdef C1M1C
+#undef C1M1C
+sfr at 0xEB C1M1C ; // DS80C390 specific
+#endif
+
+#ifdef C1M2C
+#undef C1M2C
+sfr at 0xEC C1M2C ; // DS80C390 specific
+#endif
+
+#ifdef C1M3C
+#undef C1M3C
+sfr at 0xED C1M3C ; // DS80C390 specific
+#endif
+
+#ifdef C1M4C
+#undef C1M4C
+sfr at 0xEE C1M4C ; // DS80C390 specific
+#endif
+
+#ifdef C1M5C
+#undef C1M5C
+sfr at 0xEF C1M5C ; // DS80C390 specific
+#endif
+
+#ifdef C1M6C
+#undef C1M6C
+sfr at 0xF3 C1M6C ; // DS80C390 specific
+#endif
+
+#ifdef C1M7C
+#undef C1M7C
+sfr at 0xF4 C1M7C ; // DS80C390 specific
+#endif
+
+#ifdef C1M8C
+#undef C1M8C
+sfr at 0xF5 C1M8C ; // DS80C390 specific
+#endif
+
+#ifdef C1M9C
+#undef C1M9C
+sfr at 0xF6 C1M9C ; // DS80C390 specific
+#endif
+
+#ifdef C1M10C
+#undef C1M10C
+sfr at 0xF7 C1M10C ; // DS80C390 specific
+#endif
+
+#ifdef C1M11C
+#undef C1M11C
+sfr at 0xFB C1M11C ; // DS80C390 specific
+#endif
+
+#ifdef C1M12C
+#undef C1M12C
+sfr at 0xFC C1M12C ; // DS80C390 specific
+#endif
+
+#ifdef C1M13C
+#undef C1M13C
+sfr at 0xFD C1M13C ; // DS80C390 specific
+#endif
+
+#ifdef C1M14C
+#undef C1M14C
+sfr at 0xFE C1M14C ; // DS80C390 specific
+#endif
+
+#ifdef C1M15C
+#undef C1M15C
+sfr at 0xFF C1M15C ; // DS80C390 specific
+#endif
+
+#ifdef C1S
+#undef C1S
+sfr at 0xE4 C1S ; // DS80C390 specific
+// Not directly accessible bits
+#define ER0 0x01
+#define ER1 0x02
+#define ER2 0x04
+#define TXS 0x08
+#define RXS 0x10
+#define WKS 0x20
+#define CECE 0x40
+#define BSS 0x80
+#endif
+
+#ifdef C1ITE
+#undef C1ITE
+sfr at 0xE6 C1TE ; // DS80C390 specific
+#endif
+
+#ifdef C1RSM0
+#undef C1RSM0
+sfr at 0xD6 C1RSM0 ; // DS80C390 specific
+#endif
+
+#ifdef C1RSM1
+#undef C1RSM1
+sfr at 0xD7 C1RSM1 ; // DS80C390 specific
+#endif
+
+#ifdef C1TMA0
+#undef C1TMA0
+sfr at 0xDE C1TMA0 ; // DS80C390 specific
+#endif
+
+#ifdef C1TMA1
+#undef C1TMA1
+sfr at 0xDF C1TMA1 ; // DS80C390 specific
+#endif
+