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Add test plan and test files
[hw/easymega]
/
Makefile
diff --git
a/Makefile
b/Makefile
index 0aed1dd97e0b735051570e4be370183862322d7d..28b9cbda9785e19f704aa6bec24436ea1c91a359 100644
(file)
--- a/
Makefile
+++ b/
Makefile
@@
-10,4
+10,9
@@
LAYERS=4
# sides with silkscreen, can be none|top|bottom|both
SILK=both
# sides with silkscreen, can be none|top|bottom|both
SILK=both
-include ../altusmetrum/pcb.mk
+include ../altusmetrum/pcb-rnd.mk
+
+TEST_FILES=EasyMega-Test-Plan.pdf EasyMega-Test-Plan.doc easymega-v3.0-combined-1.9.18.dfu easymega-v3.0-combined-1.9.18.ihx
+
+easymega-test.zip: $(TEST_FILES)
+ rm -f $@ && zip $@ $(TEST_FILES)