00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. July 2011 00005 * $Revision: V1.0.10 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_cmplx_mult_cmplx_f32.c 00009 * 00010 * Description: Floating-point complex-by-complex multiplication 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Version 1.0.10 2011/7/15 00015 * Big Endian support added and Merged M0 and M3/M4 Source code. 00016 * 00017 * Version 1.0.3 2010/11/29 00018 * Re-organized the CMSIS folders and updated documentation. 00019 * 00020 * Version 1.0.2 2010/11/11 00021 * Documentation updated. 00022 * 00023 * Version 1.0.1 2010/10/05 00024 * Production release and review comments incorporated. 00025 * 00026 * Version 1.0.0 2010/09/20 00027 * Production release and review comments incorporated. 00028 * -------------------------------------------------------------------- */ 00029 00030 #include "arm_math.h" 00031 00073 void arm_cmplx_mult_cmplx_f32( 00074 float32_t * pSrcA, 00075 float32_t * pSrcB, 00076 float32_t * pDst, 00077 uint32_t numSamples) 00078 { 00079 float32_t a, b, c, d; /* Temporary variables to store real and imaginary values */ 00080 00081 #ifndef ARM_MATH_CM0 00082 00083 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00084 uint32_t blkCnt; /* loop counters */ 00085 00086 /* loop Unrolling */ 00087 blkCnt = numSamples >> 2u; 00088 00089 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00090 ** a second loop below computes the remaining 1 to 3 samples. */ 00091 while(blkCnt > 0u) 00092 { 00093 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ 00094 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ 00095 a = *pSrcA++; 00096 b = *pSrcA++; 00097 c = *pSrcB++; 00098 d = *pSrcB++; 00099 00100 /* store the result in the destination buffer. */ 00101 *pDst++ = (a * c) - (b * d); 00102 *pDst++ = (a * d) + (b * c); 00103 00104 a = *pSrcA++; 00105 b = *pSrcA++; 00106 c = *pSrcB++; 00107 d = *pSrcB++; 00108 00109 *pDst++ = (a * c) - (b * d); 00110 *pDst++ = (a * d) + (b * c); 00111 00112 a = *pSrcA++; 00113 b = *pSrcA++; 00114 c = *pSrcB++; 00115 d = *pSrcB++; 00116 00117 *pDst++ = (a * c) - (b * d); 00118 *pDst++ = (a * d) + (b * c); 00119 00120 a = *pSrcA++; 00121 b = *pSrcA++; 00122 c = *pSrcB++; 00123 d = *pSrcB++; 00124 00125 *pDst++ = (a * c) - (b * d); 00126 *pDst++ = (a * d) + (b * c); 00127 00128 /* Decrement the numSamples loop counter */ 00129 blkCnt--; 00130 } 00131 00132 /* If the numSamples is not a multiple of 4, compute any remaining output samples here. 00133 ** No loop unrolling is used. */ 00134 blkCnt = numSamples % 0x4u; 00135 00136 while(blkCnt > 0u) 00137 { 00138 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ 00139 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ 00140 a = *pSrcA++; 00141 b = *pSrcA++; 00142 c = *pSrcB++; 00143 d = *pSrcB++; 00144 00145 /* store the result in the destination buffer. */ 00146 *pDst++ = (a * c) - (b * d); 00147 *pDst++ = (a * d) + (b * c); 00148 00149 /* Decrement the numSamples loop counter */ 00150 blkCnt--; 00151 } 00152 00153 #else 00154 00155 /* Run the below code for Cortex-M0 */ 00156 00157 while(numSamples > 0u) 00158 { 00159 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ 00160 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ 00161 a = *pSrcA++; 00162 b = *pSrcA++; 00163 c = *pSrcB++; 00164 d = *pSrcB++; 00165 00166 /* store the result in the destination buffer. */ 00167 *pDst++ = (a * c) - (b * d); 00168 *pDst++ = (a * d) + (b * c); 00169 00170 /* Decrement the numSamples loop counter */ 00171 numSamples--; 00172 } 00173 00174 #endif /* #ifndef ARM_MATH_CM0 */ 00175 00176 } 00177