3 * Copyright 2008 Free Software Foundation, Inc.
5 * This program is free software: you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, either version 3 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef INCLUDED_USRP2_IMPL_H
20 #define INCLUDED_USRP2_IMPL_H
22 #include <usrp2/usrp2.h>
23 #include <usrp2/data_handler.h>
24 #include <usrp2_eth_packet.h>
25 #include <boost/scoped_ptr.hpp>
35 class usrp2_tune_result;
39 //! High-level d'board info
42 double freq_min; // Hz
43 double freq_max; // Hz
44 double gain_min; // dB
45 double gain_max; // dB
46 double gain_step_size; // dB
48 db_info() : dbid(-1), freq_min(0), freq_max(0),
49 gain_min(0), gain_max(0), gain_step_size(0) {}
52 class usrp2::impl : private data_handler
54 static const size_t NRIDS = 256;
55 static const size_t NCHANS = 32;
57 eth_buffer *d_eth_buf;
59 std::string d_addr; // FIXME: use u2_mac_addr_t instead
60 usrp2_thread *d_bg_thread;
61 volatile bool d_bg_running; // TODO: multistate if needed
66 unsigned int d_num_rx_frames;
67 unsigned int d_num_rx_missing;
68 unsigned int d_num_rx_overruns;
69 unsigned int d_num_rx_bytes;
71 unsigned int d_num_enqueued;
72 omni_mutex d_enqueued_mutex;
73 omni_condition d_bg_pending_cond;
75 // all pending_replies are stack allocated, thus no possibility of leaking these
76 pending_reply *d_pending_replies[NRIDS]; // indexed by 8-bit reply id
78 std::vector<ring_sptr> d_channel_rings; // indexed by 5-bit channel number
83 int d_tx_interp; // shadow tx interp
84 int d_rx_decim; // shadow rx decim
87 omni_mutex_lock l(d_enqueued_mutex);
92 omni_mutex_lock l(d_enqueued_mutex);
93 if (--d_num_enqueued == 0)
94 d_bg_pending_cond.signal();
97 static bool parse_mac_addr(const std::string &s, u2_mac_addr_t *p);
98 void init_et_hdrs(u2_eth_packet_t *p, const std::string &dst);
99 void init_etf_hdrs(u2_eth_packet_t *p, const std::string &dst,
100 int word0_flags, int chan, uint32_t timestamp);
102 void init_config_rx_v2_cmd(op_config_rx_v2_cmd *cmd);
103 void init_config_tx_v2_cmd(op_config_tx_v2_cmd *cmd);
104 bool transmit_cmd(void *cmd, size_t len, pending_reply *p, double secs=0.0);
105 virtual data_handler::result operator()(const void *base, size_t len);
106 data_handler::result handle_control_packet(const void *base, size_t len);
107 data_handler::result handle_data_packet(const void *base, size_t len);
111 impl(const std::string &ifc, props *p);
116 std::string mac_addr() const { return d_addr; } // FIXME: convert from u2_mac_addr_t
120 bool set_rx_gain(double gain);
121 double rx_gain_min() { return d_rx_db_info.gain_min; }
122 double rx_gain_max() { return d_rx_db_info.gain_max; }
123 double rx_gain_db_per_step() { return d_rx_db_info.gain_step_size; }
124 bool set_rx_center_freq(double frequency, tune_result *result);
125 double rx_freq_min() { return d_rx_db_info.freq_min; }
126 double rx_freq_max() { return d_rx_db_info.freq_max; }
127 bool set_rx_decim(int decimation_factor);
128 int rx_decim() { return d_rx_decim; }
129 bool set_rx_scale_iq(int scale_i, int scale_q);
130 bool start_rx_streaming(unsigned int channel, unsigned int items_per_frame);
131 bool rx_samples(unsigned int channel, rx_sample_handler *handler);
132 bool stop_rx_streaming(unsigned int channel);
133 unsigned int rx_overruns() const { return d_num_rx_overruns; }
134 unsigned int rx_missing() const { return d_num_rx_missing; }
138 bool set_tx_gain(double gain);
139 double tx_gain_min() { return d_tx_db_info.gain_min; }
140 double tx_gain_max() { return d_tx_db_info.gain_max; }
141 double tx_gain_db_per_step() { return d_tx_db_info.gain_step_size; }
142 bool set_tx_center_freq(double frequency, tune_result *result);
143 double tx_freq_min() { return d_tx_db_info.freq_min; }
144 double tx_freq_max() { return d_tx_db_info.freq_max; }
145 bool set_tx_interp(int interpolation_factor);
146 int tx_interp() { return d_tx_interp; }
147 bool set_tx_scale_iq(int scale_i, int scale_q);
149 bool tx_32fc(unsigned int channel,
150 const std::complex<float> *samples,
152 const tx_metadata *metadata);
154 bool tx_16sc(unsigned int channel,
155 const std::complex<int16_t> *samples,
157 const tx_metadata *metadata);
159 bool tx_raw(unsigned int channel,
160 const uint32_t *items,
162 const tx_metadata *metadata);
166 bool config_mimo(int flags);
167 bool fpga_master_clock_freq(long *freq);
168 bool adc_rate(long *rate);
169 bool dac_rate(long *rate);
170 bool tx_daughterboard_id(int *dbid);
171 bool rx_daughterboard_id(int *dbid);
175 bool burn_mac_addr(const std::string &new_addr);
177 std::vector<uint8_t> peek(uint32_t addr, uint32_t len);
182 #endif /* INCLUDED_USRP2_IMPL_H */