3 * Copyright 2008,2009 Free Software Foundation, Inc.
5 * This program is free software: you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, either version 3 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 #include <usrp2/usrp2.h>
24 #include <usrp2/tune_result.h>
25 #include <usrp2/copiers.h>
26 #include <gruel/inet.h>
27 #include <usrp2_types.h>
28 #include "usrp2_impl.h"
29 #include "usrp2_thread.h"
30 #include "eth_buffer.h"
31 #include "pktfilter.h"
41 #define USRP2_IMPL_DEBUG 0
43 #define DEBUG_LOG(x) ::write(2, x, 1)
48 static const int DEFAULT_RX_SCALE = 1024;
52 static const double DEF_CMD_TIMEOUT = 0.1;
55 opcode_to_string(int opcode)
58 case OP_EOP: return "OP_EOP";
59 case OP_ID: return "OP_ID";
60 case OP_ID_REPLY: return "OP_ID_REPLY";
61 case OP_BURN_MAC_ADDR: return "OP_BURN_MAC_ADDR";
62 case OP_READ_TIME: return "OP_READ_TIME";
63 case OP_READ_TIME_REPLY: return "OP_READ_TIME_REPLY";
64 case OP_CONFIG_RX_V2: return "OP_CONFIG_RX_V2";
65 case OP_CONFIG_RX_REPLY_V2: return "OP_CONFIG_RX_REPLY_V2";
66 case OP_CONFIG_TX_V2: return "OP_CONFIG_TX_V2";
67 case OP_CONFIG_TX_REPLY_V2: return "OP_CONFIG_TX_REPLY_V2";
68 case OP_START_RX_STREAMING: return "OP_START_RX_STREAMING";
69 case OP_STOP_RX: return "OP_STOP_RX";
70 case OP_CONFIG_MIMO: return "OP_CONFIG_MIMO";
71 case OP_DBOARD_INFO: return "OP_DBOARD_INFO";
72 case OP_DBOARD_INFO_REPLY: return "OP_DBOARD_INFO_REPLY";
73 case OP_SYNC_TO_PPS: return "OP_SYNC_TO_PPS";
74 case OP_PEEK: return "OP_PEEK";
75 case OP_PEEK_REPLY: return "OP_PEEK_REPLY";
76 case OP_SET_TX_LO_OFFSET: return "OP_SET_TX_LO_OFFSET";
77 case OP_SET_TX_LO_OFFSET_REPLY: return "OP_SET_TX_LO_OFFSET_REPLY";
78 case OP_SET_RX_LO_OFFSET: return "OP_SET_RX_LO_OFFSET";
79 case OP_SET_RX_LO_OFFSET_REPLY: return "OP_SET_RX_LO_OFFSET_REPLY";
80 case OP_SYNC_EVERY_PPS: return "OP_SYNC_EVERY_PPS";
81 case OP_SYNC_EVERY_PPS_REPLY: return "OP_SYNC_EVERY_PPS_REPLY";
85 snprintf(buf, sizeof(buf), "<unknown opcode: %d>", opcode);
92 * \param p points to fixed header
93 * \param payload_len_in_bytes is length of the fixed hdr and the payload
94 * \param[out] items is set to point to the first uint32 item in the payload
95 * \param[out] nitems is set to the number of uint32 items in the payload
96 * \param[out] md is filled in with the parsed metadata from the frame.
99 parse_rx_metadata(void *p, size_t payload_len_in_bytes,
100 uint32_t **items, size_t *nitems_in_uint32s, rx_metadata *md)
102 if (payload_len_in_bytes < sizeof(u2_fixed_hdr_t)) // invalid format
105 // FIXME deal with the fact that (p % 4) == 2
106 //assert((((uintptr_t) p) % 4) == 0); // must be 4-byte aligned
108 u2_fixed_hdr_t *fh = static_cast<u2_fixed_hdr_t *>(p);
110 // FIXME unaligned loads!
111 md->word0 = u2p_word0(fh);
112 md->timestamp = u2p_timestamp(fh);
114 // FIXME when we've got more info
115 // md->start_of_burst = (md->word0 & XXX) != 0;
116 // md->end_of_burst = (md->word0 & XXX) != 0;
117 // md->rx_overrun = (md->word0 & XXX) != 0;
118 md->start_of_burst = 0;
119 md->end_of_burst = 0;
122 *items = (uint32_t *)(&fh[1]);
123 size_t nbytes = payload_len_in_bytes - sizeof(u2_fixed_hdr_t);
124 assert((nbytes % sizeof(uint32_t)) == 0);
125 *nitems_in_uint32s = nbytes / sizeof(uint32_t);
131 usrp2::impl::impl(const std::string &ifc, props *p)
132 : d_eth_buf(new eth_buffer()), d_ifc_name(ifc), d_pf(0), d_bg_thread(0),
133 d_bg_running(false), d_rx_seqno(-1), d_tx_seqno(0), d_next_rid(0),
134 d_num_rx_frames(0), d_num_rx_missing(0), d_num_rx_overruns(0), d_num_rx_bytes(0),
135 d_num_enqueued(0), d_enqueued_mutex(), d_bg_pending_cond(&d_enqueued_mutex),
136 d_channel_rings(NCHANS), d_tx_interp(0), d_rx_decim(0)
138 if (!d_eth_buf->open(ifc, htons(U2_ETHERTYPE)))
139 throw std::runtime_error("Unable to register USRP2 protocol");
141 d_pf = pktfilter::make_ethertype_inbound(U2_ETHERTYPE, d_eth_buf->mac());
142 if (!d_pf || !d_eth_buf->attach_pktfilter(d_pf))
143 throw std::runtime_error("Unable to attach packet filter.");
147 if (USRP2_IMPL_DEBUG)
148 std::cerr << "usrp2 constructor: using USRP2 at " << d_addr << std::endl;
150 memset(d_pending_replies, 0, sizeof(d_pending_replies));
152 d_bg_thread = new usrp2_thread(this);
153 d_bg_thread->start();
155 if (!dboard_info()) // we're hosed
156 throw std::runtime_error("Unable to retrieve daughterboard info");
161 tx_daughterboard_id(&dbid);
162 fprintf(stderr, "Tx dboard 0x%x\n", dbid);
163 fprintf(stderr, " freq_min = %g\n", tx_freq_min());
164 fprintf(stderr, " freq_max = %g\n", tx_freq_max());
165 fprintf(stderr, " gain_min = %g\n", tx_gain_min());
166 fprintf(stderr, " gain_max = %g\n", tx_gain_max());
167 fprintf(stderr, " gain_db_per_step = %g\n", tx_gain_db_per_step());
169 rx_daughterboard_id(&dbid);
170 fprintf(stderr, "Rx dboard 0x%x\n", dbid);
171 fprintf(stderr, " freq_min = %g\n", rx_freq_min());
172 fprintf(stderr, " freq_max = %g\n", rx_freq_max());
173 fprintf(stderr, " gain_min = %g\n", rx_gain_min());
174 fprintf(stderr, " gain_max = %g\n", rx_gain_max());
175 fprintf(stderr, " gain_db_per_step = %g\n", rx_gain_db_per_step());
178 // Ensure any custom values in hardware are cleared
180 std::cerr << "usrp2::ctor reset_db failed\n";
182 // default gains to mid point
183 if (!set_tx_gain((tx_gain_min() + tx_gain_max()) / 2))
184 std::cerr << "usrp2::ctor set_tx_gain failed\n";
186 if (!set_rx_gain((rx_gain_min() + rx_gain_max()) / 2))
187 std::cerr << "usrp2::ctor set_rx_gain failed\n";
189 // default interp and decim
190 if (!set_tx_interp(12))
191 std::cerr << "usrp2::ctor set_tx_interp failed\n";
193 if (!set_rx_decim(12))
194 std::cerr << "usrp2::ctor set_rx_decim failed\n";
196 // set workable defaults for scaling
197 if (!set_rx_scale_iq(DEFAULT_RX_SCALE, DEFAULT_RX_SCALE))
198 std::cerr << "usrp2::ctor set_rx_scale_iq failed\n";
204 d_bg_thread = 0; // thread class deletes itself
209 if (USRP2_IMPL_DEBUG) {
210 std::cerr << std::endl
211 << "usrp2 destructor: received " << d_num_rx_frames
212 << " frames, with " << d_num_rx_missing << " lost ("
213 << (d_num_rx_frames == 0 ? 0 : (int)(100.0*d_num_rx_missing/d_num_rx_frames))
214 << "%), totaling " << d_num_rx_bytes
215 << " bytes" << std::endl;
220 usrp2::impl::parse_mac_addr(const std::string &s, u2_mac_addr_t *p)
222 p->addr[0] = 0x00; // Matt's IAB
234 return sscanf(s.c_str(), "%hhx:%hhx", &p->addr[4], &p->addr[5]) == 2;
237 return sscanf(s.c_str(), "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx",
238 &p->addr[0], &p->addr[1], &p->addr[2],
239 &p->addr[3], &p->addr[4], &p->addr[5]) == 6;
246 usrp2::impl::init_et_hdrs(u2_eth_packet_t *p, const std::string &dst)
248 p->ehdr.ethertype = htons(U2_ETHERTYPE);
249 parse_mac_addr(dst, &p->ehdr.dst);
250 memcpy(&p->ehdr.src, d_eth_buf->mac(), 6);
251 p->thdr.flags = 0; // FIXME transport header values?
252 p->thdr.seqno = d_tx_seqno++;
257 usrp2::impl::init_etf_hdrs(u2_eth_packet_t *p, const std::string &dst,
258 int word0_flags, int chan, uint32_t timestamp)
260 init_et_hdrs(p, dst);
261 u2p_set_word0(&p->fixed, word0_flags, chan);
262 u2p_set_timestamp(&p->fixed, timestamp);
264 if (chan == CONTROL_CHAN) { // no sequence numbers, back it out
271 usrp2::impl::init_config_rx_v2_cmd(op_config_rx_v2_cmd *cmd)
273 memset(cmd, 0, sizeof(*cmd));
274 init_etf_hdrs(&cmd->h, d_addr, 0, CONTROL_CHAN, -1);
275 cmd->op.opcode = OP_CONFIG_RX_V2;
276 cmd->op.len = sizeof(cmd->op);
277 cmd->op.rid = d_next_rid++;
278 cmd->eop.opcode = OP_EOP;
279 cmd->eop.len = sizeof(cmd->eop);
283 usrp2::impl::init_config_tx_v2_cmd(op_config_tx_v2_cmd *cmd)
285 memset(cmd, 0, sizeof(*cmd));
286 init_etf_hdrs(&cmd->h, d_addr, 0, CONTROL_CHAN, -1);
287 cmd->op.opcode = OP_CONFIG_TX_V2;
288 cmd->op.len = sizeof(cmd->op);
289 cmd->op.rid = d_next_rid++;
290 cmd->eop.opcode = OP_EOP;
291 cmd->eop.len = sizeof(cmd->eop);
295 usrp2::impl::transmit_cmd(void *cmd, size_t len, pending_reply *p, double secs)
298 d_pending_replies[p->rid()] = p;
301 if (d_eth_buf->tx_frame(cmd, len) != eth_buffer::EB_OK) {
302 d_pending_replies[p->rid()] = 0;
310 d_pending_replies[p->rid()] = 0;
314 // ----------------------------------------------------------------
315 // Background loop: received packet demuxing
316 // ----------------------------------------------------------------
319 usrp2::impl::stop_bg()
321 d_bg_running = false;
322 d_bg_pending_cond.signal();
325 d_bg_thread->join(&dummy_status);
329 usrp2::impl::bg_loop()
332 while(d_bg_running) {
334 // Receive available frames from ethernet buffer. Handler will
335 // process control frames, enqueue data packets in channel
336 // rings, and signal blocked API threads
337 int res = d_eth_buf->rx_frames(this, 100); // FIXME magic timeout
338 if (res == eth_buffer::EB_ERROR)
341 // Wait for user API thread(s) to process all enqueued packets.
342 // The channel ring thread that decrements d_num_enqueued to zero
343 // will signal this thread to continue.
345 omni_mutex_lock l(d_enqueued_mutex);
346 while(d_num_enqueued > 0 && d_bg_running)
347 d_bg_pending_cond.wait();
350 d_bg_running = false;
354 // passed to eth_buffer::rx_frames
357 usrp2::impl::operator()(const void *base, size_t len)
359 u2_eth_samples_t *pkt = (u2_eth_samples_t *)base;
361 // FIXME unaligned load!
362 int chan = u2p_chan(&pkt->hdrs.fixed);
364 if (chan == CONTROL_CHAN) { // control packets
366 return handle_control_packet(base, len);
368 else { // data packets
369 return handle_data_packet(base, len);
376 usrp2::impl::handle_control_packet(const void *base, size_t len)
378 // point to beginning of payload (subpackets)
379 unsigned char *p = (unsigned char *)base + sizeof(u2_eth_packet_t);
381 // FIXME (p % 4) == 2. Not good. Must watch for unaligned loads.
383 // FIXME iterate over payload, handling more than a single subpacket.
386 unsigned int oplen = p[1];
387 unsigned int rid = p[2];
389 pending_reply *rp = d_pending_replies[rid];
391 unsigned int buflen = rp->len();
392 if (oplen != buflen) {
393 std::cerr << "usrp2: mismatched command reply length (expected: "
394 << buflen << " got: " << oplen << "). "
395 << "op = " << opcode_to_string(opcode) << std::endl;
398 // Copy reply into caller's buffer
399 memcpy(rp->buffer(), p, std::min(oplen, buflen));
401 d_pending_replies[rid] = 0;
402 return data_handler::RELEASE;
405 // TODO: handle unsolicited, USRP2 initiated, or late replies
407 return data_handler::RELEASE;
411 usrp2::impl::handle_data_packet(const void *base, size_t len)
413 u2_eth_samples_t *pkt = (u2_eth_samples_t *)base;
415 d_num_rx_bytes += len;
417 /* --- FIXME start of fake transport layer handler --- */
419 if (d_rx_seqno != -1) {
420 int expected_seqno = (d_rx_seqno + 1) & 0xFF;
421 int seqno = pkt->hdrs.thdr.seqno;
423 if (seqno != expected_seqno) {
424 ::write(2, "S", 1); // missing sequence number
425 int missing = seqno - expected_seqno;
430 d_num_rx_missing += missing;
434 d_rx_seqno = pkt->hdrs.thdr.seqno;
436 /* --- end of fake transport layer handler --- */
438 // FIXME unaligned load!
439 unsigned int chan = u2p_chan(&pkt->hdrs.fixed);
441 if (!d_channel_rings[chan]) {
443 return data_handler::RELEASE; // discard packet, no channel handler
446 // Strip off ethernet header and transport header and enqueue the rest
448 size_t offset = offsetof(u2_eth_samples_t, hdrs.fixed);
449 if (d_channel_rings[chan]->enqueue(&pkt->hdrs.fixed, len-offset)) {
452 return data_handler::KEEP; // channel ring runner will mark frame done
456 return data_handler::RELEASE; // discard, no room in channel ring
458 return data_handler::RELEASE;
462 // ----------------------------------------------------------------
464 // ----------------------------------------------------------------
467 usrp2::impl::set_rx_gain(double gain)
469 op_config_rx_v2_cmd cmd;
470 op_config_rx_reply_v2_t reply;
472 init_config_rx_v2_cmd(&cmd);
473 cmd.op.valid = htons(CFGV_GAIN);
474 cmd.op.gain = htons(u2_double_to_fxpt_gain(gain));
476 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
477 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
480 bool success = (ntohx(reply.ok) == 1);
485 usrp2::impl::set_rx_lo_offset(double frequency)
490 memset(&cmd, 0, sizeof(cmd));
491 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
492 cmd.op.opcode = OP_SET_RX_LO_OFFSET;
493 cmd.op.len = sizeof(cmd.op);
494 cmd.op.rid = d_next_rid++;
496 u2_fxpt_freq_t fxpt = u2_double_to_fxpt_freq(frequency);
497 cmd.op.freq_hi = htonl(u2_fxpt_freq_hi(fxpt));
498 cmd.op.freq_lo = htonl(u2_fxpt_freq_lo(fxpt));
500 cmd.eop.opcode = OP_EOP;
501 cmd.eop.len = sizeof(cmd.eop);
503 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
504 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
507 bool success = (ntohx(reply.ok) == 1);
512 usrp2::impl::set_rx_center_freq(double frequency, tune_result *result)
514 op_config_rx_v2_cmd cmd;
515 op_config_rx_reply_v2_t reply;
517 init_config_rx_v2_cmd(&cmd);
518 cmd.op.valid = htons(CFGV_FREQ);
519 u2_fxpt_freq_t fxpt = u2_double_to_fxpt_freq(frequency);
520 cmd.op.freq_hi = htonl(u2_fxpt_freq_hi(fxpt));
521 cmd.op.freq_lo = htonl(u2_fxpt_freq_lo(fxpt));
523 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
524 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
527 bool success = (ntohx(reply.ok) == 1);
528 if (result && success) {
529 result->baseband_freq =
530 u2_fxpt_freq_to_double(
531 u2_fxpt_freq_from_hilo(ntohl(reply.baseband_freq_hi),
532 ntohl(reply.baseband_freq_lo)));
535 u2_fxpt_freq_to_double(
536 u2_fxpt_freq_from_hilo(ntohl(reply.ddc_freq_hi),
537 ntohl(reply.ddc_freq_lo)));
539 result->residual_freq =
540 u2_fxpt_freq_to_double(
541 u2_fxpt_freq_from_hilo(ntohl(reply.residual_freq_hi),
542 ntohl(reply.residual_freq_lo)));
544 result->spectrum_inverted = (bool)(ntohx(reply.inverted) == 1);
551 usrp2::impl::set_rx_decim(int decimation_factor)
553 op_config_rx_v2_cmd cmd;
554 op_config_rx_reply_v2_t reply;
556 init_config_rx_v2_cmd(&cmd);
557 cmd.op.valid = htons(CFGV_INTERP_DECIM);
558 cmd.op.decim = htonl(decimation_factor);
560 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
561 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
564 bool success = (ntohx(reply.ok) == 1);
566 d_rx_decim = decimation_factor;
571 usrp2::impl::set_rx_scale_iq(int scale_i, int scale_q)
573 op_config_rx_v2_cmd cmd;
574 op_config_rx_reply_v2_t reply;
576 init_config_rx_v2_cmd(&cmd);
577 cmd.op.valid = htons(CFGV_SCALE_IQ);
578 cmd.op.scale_iq = htonl(((scale_i & 0xffff) << 16) | (scale_q & 0xffff));
580 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
581 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
584 bool success = (ntohx(reply.ok) == 1);
589 usrp2::impl::start_rx_streaming(unsigned int channel, unsigned int items_per_frame)
591 if (channel > MAX_CHAN) {
592 std::cerr << "usrp2: invalid channel number (" << channel
597 if (channel > 0) { // until firmware supports multiple streams
598 std::cerr << "usrp2: channel " << channel
599 << " not implemented" << std::endl;
603 if (d_channel_rings[channel]) {
604 std::cerr << "usrp2: channel " << channel
605 << " already streaming" << std::endl;
609 d_channel_rings[channel] = ring_sptr(new ring(d_eth_buf->max_frames()));
611 if (items_per_frame == 0)
612 items_per_frame = U2_MAX_SAMPLES; // minimize overhead
614 op_start_rx_streaming_cmd cmd;
617 memset(&cmd, 0, sizeof(cmd));
618 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
619 cmd.op.opcode = OP_START_RX_STREAMING;
620 cmd.op.len = sizeof(cmd.op);
621 cmd.op.rid = d_next_rid++;
622 cmd.op.items_per_frame = htonl(items_per_frame);
623 cmd.eop.opcode = OP_EOP;
624 cmd.eop.len = sizeof(cmd.eop);
626 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
627 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
630 bool success = (ntohx(reply.ok) == 1);
635 usrp2::impl::stop_rx_streaming(unsigned int channel)
637 if (channel > MAX_CHAN) {
638 std::cerr << "usrp2: invalid channel number (" << channel
643 if (channel > 0) { // until firmware supports multiple streams
644 std::cerr << "usrp2: channel " << channel
645 << " not implemented" << std::endl;
649 #if 0 // don't be overzealous.
650 if (!d_channel_rings[channel]) {
651 std::cerr << "usrp2: channel " << channel
652 << " not streaming" << std::endl;
660 memset(&cmd, 0, sizeof(cmd));
661 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
662 cmd.op.opcode = OP_STOP_RX;
663 cmd.op.len = sizeof(cmd.op);
664 cmd.op.rid = d_next_rid++;
665 cmd.eop.opcode = OP_EOP;
666 cmd.eop.len = sizeof(cmd.eop);
668 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
669 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
672 bool success = (ntohx(reply.ok) == 1);
674 d_channel_rings[channel].reset();
681 usrp2::impl::rx_samples(unsigned int channel, rx_sample_handler *handler)
683 if (channel > MAX_CHAN) {
684 std::cerr << "usrp2: invalid channel (" << channel
685 << " )" << std::endl;
690 std::cerr << "usrp2: channel " << channel
691 << " not implemented" << std::endl;
695 ring_sptr rp = d_channel_rings[channel];
697 std::cerr << "usrp2: channel " << channel
698 << " not receiving" << std::endl;
702 // Wait for frames available in channel ring
704 rp->wait_for_not_empty();
707 // Iterate through frames and present to user
709 size_t frame_len_in_bytes;
710 while (rp->dequeue(&p, &frame_len_in_bytes)) {
711 uint32_t *items; // points to beginning of data items
712 size_t nitems_in_uint32s;
714 if (!parse_rx_metadata(p, frame_len_in_bytes, &items, &nitems_in_uint32s, &md))
717 bool want_more = (*handler)(items, nitems_in_uint32s, &md);
718 d_eth_buf->release_frame(p);
728 // ----------------------------------------------------------------
730 // ----------------------------------------------------------------
733 usrp2::impl::set_tx_gain(double gain)
735 op_config_tx_v2_cmd cmd;
736 op_config_tx_reply_v2_t reply;
738 init_config_tx_v2_cmd(&cmd);
739 cmd.op.valid = htons(CFGV_GAIN);
740 cmd.op.gain = htons(u2_double_to_fxpt_gain(gain));
742 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
743 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
746 bool success = (ntohx(reply.ok) == 1);
751 usrp2::impl::set_tx_lo_offset(double frequency)
756 memset(&cmd, 0, sizeof(cmd));
757 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
758 cmd.op.opcode = OP_SET_TX_LO_OFFSET;
759 cmd.op.len = sizeof(cmd.op);
760 cmd.op.rid = d_next_rid++;
762 u2_fxpt_freq_t fxpt = u2_double_to_fxpt_freq(frequency);
763 cmd.op.freq_hi = htonl(u2_fxpt_freq_hi(fxpt));
764 cmd.op.freq_lo = htonl(u2_fxpt_freq_lo(fxpt));
766 cmd.eop.opcode = OP_EOP;
767 cmd.eop.len = sizeof(cmd.eop);
769 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
770 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
773 bool success = (ntohx(reply.ok) == 1);
778 usrp2::impl::set_tx_center_freq(double frequency, tune_result *result)
780 op_config_tx_v2_cmd cmd;
781 op_config_tx_reply_v2_t reply;
783 init_config_tx_v2_cmd(&cmd);
784 cmd.op.valid = htons(CFGV_FREQ);
785 u2_fxpt_freq_t fxpt = u2_double_to_fxpt_freq(frequency);
786 cmd.op.freq_hi = htonl(u2_fxpt_freq_hi(fxpt));
787 cmd.op.freq_lo = htonl(u2_fxpt_freq_lo(fxpt));
789 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
790 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
793 bool success = (ntohx(reply.ok) == 1);
794 if (result && success) {
795 result->baseband_freq =
796 u2_fxpt_freq_to_double(
797 u2_fxpt_freq_from_hilo(ntohl(reply.baseband_freq_hi),
798 ntohl(reply.baseband_freq_lo)));
801 u2_fxpt_freq_to_double(
802 u2_fxpt_freq_from_hilo(ntohl(reply.duc_freq_hi),
803 ntohl(reply.duc_freq_lo)));
805 result->residual_freq =
806 u2_fxpt_freq_to_double(
807 u2_fxpt_freq_from_hilo(ntohl(reply.residual_freq_hi),
808 ntohl(reply.residual_freq_lo)));
810 result->spectrum_inverted = (bool)(ntohx(reply.inverted) == 1);
817 usrp2::impl::set_tx_interp(int interpolation_factor)
819 op_config_tx_v2_cmd cmd;
820 op_config_tx_reply_v2_t reply;
822 init_config_tx_v2_cmd(&cmd);
823 cmd.op.valid = htons(CFGV_INTERP_DECIM);
824 cmd.op.interp = htonl(interpolation_factor);
826 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
827 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
830 bool success = (ntohx(reply.ok) == 1);
832 d_tx_interp = interpolation_factor;
834 // Auto-set TX scaling based on interpolation rate
835 int scale_i, scale_q;
836 default_tx_scale_iq(d_tx_interp, &scale_i, &scale_q);
837 return set_tx_scale_iq(scale_i, scale_q);
844 usrp2::impl::default_tx_scale_iq(int interpolation_factor, int *scale_i, int *scale_q)
846 // Calculate CIC interpolation (i.e., without halfband interpolators)
847 int i = interpolation_factor;
853 // Calculate dsp_core_tx gain absent scale multipliers
854 float gain = (1.65*i*i*i)/(4096*pow(2, ceil(log2(i*i*i))));
856 // Calculate closest multiplier constant to reverse gain
857 int scale = (int)rint(1.0/gain);
858 // fprintf(stderr, "if=%i i=%i gain=%f scale=%i\n", interpolation_factor, i, gain, scale);
860 // Both I and Q are identical in this case
868 usrp2::impl::set_tx_scale_iq(int scale_i, int scale_q)
870 op_config_tx_v2_cmd cmd;
871 op_config_tx_reply_v2_t reply;
873 init_config_tx_v2_cmd(&cmd);
874 cmd.op.valid = htons(CFGV_SCALE_IQ);
875 cmd.op.scale_iq = htonl(((scale_i & 0xffff) << 16) | (scale_q & 0xffff));
877 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
878 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
881 bool success = (ntohx(reply.ok) == 1);
886 usrp2::impl::tx_32fc(unsigned int channel,
887 const std::complex<float> *samples,
889 const tx_metadata *metadata)
891 uint32_t items[nsamples];
892 copy_host_32fc_to_u2_16sc(nsamples, samples, items);
893 return tx_raw(channel, items, nsamples, metadata);
897 usrp2::impl::tx_16sc(unsigned int channel,
898 const std::complex<int16_t> *samples,
900 const tx_metadata *metadata)
902 #ifdef WORDS_BIGENDIAN
904 // Already binary equivalent to 16-bit I/Q on the wire.
905 // No conversion required.
907 assert(sizeof(samples[0]) == sizeof(uint32_t));
908 return tx_raw(channel, (const uint32_t *) samples, nsamples, metadata);
912 uint32_t items[nsamples];
913 copy_host_16sc_to_u2_16sc(nsamples, samples, items);
914 return tx_raw(channel, items, nsamples, metadata);
920 usrp2::impl::tx_raw(unsigned int channel,
921 const uint32_t *items,
923 const tx_metadata *metadata)
928 // FIXME there's the possibility that we send fewer than 9 items in a frame.
929 // That would end up glitching the transmitter, since the ethernet will pad to
930 // 64-bytes total (9 items). We really need some part of the stack to
931 // carry the real length (thdr?).
933 // fragment as necessary then fire away
935 size_t nframes = (nitems + U2_MAX_SAMPLES - 1) / U2_MAX_SAMPLES;
936 size_t last_frame = nframes - 1;
937 u2_eth_packet_t hdrs;
940 for (size_t fn = 0; fn < nframes; fn++){
941 uint32_t timestamp = 0;
945 timestamp = metadata->timestamp;
946 if (metadata->send_now)
947 flags |= U2P_TX_IMMEDIATE;
948 if (metadata->start_of_burst)
949 flags |= U2P_TX_START_OF_BURST;
952 flags |= U2P_TX_IMMEDIATE;
954 if (fn == last_frame){
955 if (metadata->end_of_burst)
956 flags |= U2P_TX_END_OF_BURST;
959 init_etf_hdrs(&hdrs, d_addr, flags, channel, timestamp);
961 size_t i = std::min((size_t) U2_MAX_SAMPLES, nitems - n);
964 iov[0].iov_base = &hdrs;
965 iov[0].iov_len = sizeof(hdrs);
966 iov[1].iov_base = const_cast<uint32_t *>(&items[n]);
967 iov[1].iov_len = i * sizeof(uint32_t);
969 size_t total = iov[0].iov_len + iov[1].iov_len;
971 fprintf(stderr, "usrp2::tx_raw: FIXME: short packet: %zd items (%zd bytes)\n", i, total);
973 if (d_eth_buf->tx_framev(iov, 2) != eth_buffer::EB_OK){
983 // ----------------------------------------------------------------
985 // ----------------------------------------------------------------
988 usrp2::impl::config_mimo(int flags)
990 op_config_mimo_cmd cmd;
993 memset(&cmd, 0, sizeof(cmd));
994 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
995 cmd.op.opcode = OP_CONFIG_MIMO;
996 cmd.op.len = sizeof(cmd.op);
997 cmd.op.rid = d_next_rid++;
998 cmd.op.flags = flags;
999 cmd.eop.opcode = OP_EOP;
1000 cmd.eop.len = sizeof(cmd.eop);
1002 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
1003 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
1006 return ntohx(reply.ok) == 1;
1010 usrp2::impl::fpga_master_clock_freq(long *freq)
1012 *freq = 100000000L; // 100 MHz
1017 usrp2::impl::adc_rate(long *rate)
1019 return fpga_master_clock_freq(rate);
1023 usrp2::impl::dac_rate(long *rate)
1025 return fpga_master_clock_freq(rate);
1029 usrp2::impl::tx_daughterboard_id(int *dbid)
1031 *dbid = d_tx_db_info.dbid;
1036 usrp2::impl::rx_daughterboard_id(int *dbid)
1038 *dbid = d_rx_db_info.dbid;
1043 // ----------------------------------------------------------------
1044 // low-level commands
1045 // ----------------------------------------------------------------
1048 usrp2::impl::burn_mac_addr(const std::string &new_addr)
1050 op_burn_mac_addr_cmd cmd;
1053 memset(&cmd, 0, sizeof(cmd));
1054 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
1055 cmd.op.opcode = OP_BURN_MAC_ADDR;
1056 cmd.op.len = sizeof(cmd.op);
1057 cmd.op.rid = d_next_rid++;
1058 if (!parse_mac_addr(new_addr, &cmd.op.addr))
1061 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
1062 if (!transmit_cmd(&cmd, sizeof(cmd), &p, 4*DEF_CMD_TIMEOUT))
1065 bool success = (ntohx(reply.ok) == 1);
1070 fill_dboard_info(db_info *dst, const u2_db_info_t *src)
1072 dst->dbid = ntohl(src->dbid);
1075 u2_fxpt_freq_to_double(u2_fxpt_freq_from_hilo(ntohl(src->freq_min_hi),
1076 ntohl(src->freq_min_lo)));
1078 u2_fxpt_freq_to_double(u2_fxpt_freq_from_hilo(ntohl(src->freq_max_hi),
1079 ntohl(src->freq_max_lo)));
1081 dst->gain_min = u2_fxpt_gain_to_double(ntohs(src->gain_min));
1082 dst->gain_max = u2_fxpt_gain_to_double(ntohs(src->gain_max));
1083 dst->gain_step_size = u2_fxpt_gain_to_double(ntohs(src->gain_step_size));
1087 usrp2::impl::dboard_info()
1089 op_dboard_info_cmd cmd;
1090 op_dboard_info_reply_t reply;
1092 memset(&cmd, 0, sizeof(cmd));
1093 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
1094 cmd.op.opcode = OP_DBOARD_INFO;
1095 cmd.op.len = sizeof(cmd.op);
1096 cmd.op.rid = d_next_rid++;
1097 cmd.eop.opcode = OP_EOP;
1098 cmd.eop.len = sizeof(cmd.eop);
1100 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
1101 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
1104 bool success = (ntohx(reply.ok) == 1);
1106 fill_dboard_info(&d_tx_db_info, &reply.tx_db_info);
1107 fill_dboard_info(&d_rx_db_info, &reply.rx_db_info);
1114 usrp2::impl::sync_to_pps()
1119 memset(&cmd, 0, sizeof(cmd));
1120 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
1121 cmd.op.opcode = OP_SYNC_TO_PPS;
1122 cmd.op.len = sizeof(cmd.op);
1123 cmd.op.rid = d_next_rid++;
1124 cmd.eop.opcode = OP_EOP;
1125 cmd.eop.len = sizeof(cmd.eop);
1127 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
1128 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
1131 return ntohx(reply.ok) == 1;
1135 usrp2::impl::sync_every_pps(bool enable)
1140 memset(&cmd, 0, sizeof(cmd));
1141 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
1142 cmd.op.opcode = OP_SYNC_EVERY_PPS;
1143 cmd.op.len = sizeof(cmd.op);
1144 cmd.op.rid = d_next_rid++;
1145 cmd.op.ok = enable ? 1 : 0;
1146 cmd.eop.opcode = OP_EOP;
1147 cmd.eop.len = sizeof(cmd.eop);
1149 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
1150 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
1153 return ntohx(reply.ok) == 1;
1156 std::vector<uint32_t>
1157 usrp2::impl::peek32(uint32_t addr, uint32_t words)
1159 std::vector<uint32_t> result; // zero sized on error return
1160 // fprintf(stderr, "usrp2::peek: addr=%08X words=%u\n", addr, words);
1162 if (addr % 4 != 0) {
1163 fprintf(stderr, "usrp2::peek: addr (=%08X) must be 32-bit word aligned\n", addr);
1171 op_generic_t *reply;
1173 int wlen = sizeof(uint32_t);
1174 int rlen = sizeof(op_generic_t);
1175 size_t bytes = words*wlen;
1177 memset(&cmd, 0, sizeof(cmd));
1178 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
1179 cmd.op.opcode = OP_PEEK;
1180 cmd.op.len = sizeof(cmd.op);
1181 cmd.op.rid = d_next_rid++;
1182 cmd.eop.opcode = OP_EOP;
1183 cmd.eop.len = sizeof(cmd.eop);
1185 cmd.op.addr = htonl(addr);
1186 cmd.op.bytes = htonl(bytes);
1188 reply = (op_generic_t *)malloc(rlen+bytes);
1189 pending_reply p(cmd.op.rid, reply, rlen+bytes);
1190 if (transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT)) {
1191 uint32_t nwords = (reply->len-rlen)/sizeof(uint32_t);
1192 uint32_t *data = (uint32_t *)(reply+rlen/wlen);
1193 for (unsigned int i = 0; i < nwords; i++)
1194 result.push_back(ntohl(data[i]));
1202 usrp2::impl::poke32(uint32_t addr, const std::vector<uint32_t> &data)
1204 if (addr % 4 != 0) {
1205 fprintf(stderr, "usrp2::poke32: addr (=%08X) must be 32-bit word aligned\n", addr);
1209 int plen = sizeof(op_poke_cmd);
1210 int wlen = sizeof(uint32_t);
1211 int max_words = (MAX_SUBPKT_LEN-plen)/wlen;
1212 int words = data.size();
1214 if (words > max_words) {
1215 fprintf(stderr, "usrp2::poke32: write size (=%u) exceeds maximum of %u words\n",
1220 //fprintf(stderr, "usrp2::poke32: addr=%08X words=%u\n", addr, words);
1228 // Allocate, clear, and initialize command packet
1229 int bytes = words*wlen;
1230 int l = plen+bytes+sizeof(*eop); // op_poke_cmd+data+eop
1231 cmd = (op_poke_cmd *)malloc(l);
1232 //fprintf(stderr, "cmd=%p l=%i\n", cmd, l);
1234 init_etf_hdrs(&cmd->h, d_addr, 0, CONTROL_CHAN, -1);
1235 cmd->op.opcode = OP_POKE;
1236 cmd->op.len = sizeof(cmd->op)+bytes;
1237 cmd->op.rid = d_next_rid++;
1238 cmd->op.addr = htonl(addr);
1240 // Copy data from vector into packet space
1241 uint32_t *dest = (uint32_t *)((uint8_t *)cmd+plen);
1242 for (int i = 0; i < words; i++) {
1243 //fprintf(stderr, "%03i@%p\n", i, dest);
1244 *dest++ = htonl(data[i]);
1247 // Write end-of-packet subpacket
1248 eop = (op_generic_t *)dest;
1249 eop->opcode = OP_EOP;
1250 eop->len = sizeof(*eop);
1251 //fprintf(stderr, "eop=%p len=%i\n", eop, eop->len);
1253 // Send command to device and retrieve reply
1256 pending_reply p(cmd->op.rid, &reply, sizeof(reply));
1257 if (transmit_cmd(cmd, l, &p, DEF_CMD_TIMEOUT))
1258 ok = (ntohx(reply.ok) == 1);
1265 usrp2::impl::reset_db()
1270 memset(&cmd, 0, sizeof(cmd));
1271 init_etf_hdrs(&cmd.h, d_addr, 0, CONTROL_CHAN, -1);
1272 cmd.op.opcode = OP_RESET_DB;
1273 cmd.op.len = sizeof(cmd.op);
1274 cmd.op.rid = d_next_rid++;
1275 cmd.eop.opcode = OP_EOP;
1276 cmd.eop.len = sizeof(cmd.eop);
1278 pending_reply p(cmd.op.rid, &reply, sizeof(reply));
1279 if (!transmit_cmd(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
1282 bool success = (ntohx(reply.ok) == 1);
1286 } // namespace usrp2