3 (input clk, input reset, input clear,
4 input [7:0] rx_data, input rx_valid, input rx_error, input rx_ack,
5 output [7:0] ll_data, output ll_sof, output ll_eof, output ll_error, output ll_src_rdy, input ll_dst_rdy );
9 assign ll_data = rx_data;
10 assign ll_src_rdy = ((rx_valid & (xfer_state != XFER_OVERRUN2) )
11 | (xfer_state == XFER_ERROR)
12 | (xfer_state == XFER_OVERRUN));
13 assign ll_sof = ((xfer_state==XFER_IDLE)|(xfer_state==XFER_ERROR)|(xfer_state==XFER_OVERRUN));
14 assign ll_eof = (rx_ack | (xfer_state==XFER_ERROR) | (xfer_state==XFER_OVERRUN));
15 assign ll_error = (xfer_state == XFER_ERROR)|(xfer_state==XFER_OVERRUN);
17 localparam XFER_IDLE = 0;
18 localparam XFER_ACTIVE = 1;
19 localparam XFER_ERROR = 2;
20 localparam XFER_ERROR2 = 3;
21 localparam XFER_OVERRUN = 4;
22 localparam XFER_OVERRUN2 = 5;
26 xfer_state <= XFER_IDLE;
31 xfer_state <= XFER_ACTIVE;
34 xfer_state <= XFER_ERROR;
36 xfer_state <= XFER_IDLE;
38 xfer_state <= XFER_OVERRUN;
41 xfer_state <= XFER_ERROR2;
44 xfer_state <= XFER_IDLE;
47 xfer_state <= XFER_OVERRUN2;
50 xfer_state <= XFER_IDLE;
51 endcase // case (xfer_state)
54 endmodule // rxmac_to_ll8