2 #-- Version Synplify Pro 8.1
3 #-- Project file D:\root\home\ethernet_tri_mode\syn\syn_xilinx.prj
4 #-- Written on Sun Jun 25 09:43:29 2006
8 add_file -verilog "../rtl/verilog/header.v"
9 add_file -verilog "../rtl/verilog/MAC_tx/MAC_tx_FF.v"
10 add_file -verilog "../rtl/verilog/MAC_tx/Ramdon_gen.v"
11 add_file -verilog "../rtl/verilog/MAC_tx/CRC_gen.v"
12 add_file -verilog "../rtl/verilog/MAC_tx/MAC_tx_addr_add.v"
13 add_file -verilog "../rtl/verilog/MAC_tx/MAC_tx_Ctrl.v"
14 add_file -verilog "../rtl/verilog/MAC_tx/flow_ctrl.v"
15 add_file -verilog "../rtl/verilog/MAC_rx/CRC_chk.v"
16 add_file -verilog "../rtl/verilog/MAC_rx/MAC_rx_add_chk.v"
17 add_file -verilog "../rtl/verilog/MAC_rx/MAC_rx_FF.v"
18 add_file -verilog "../rtl/verilog/MAC_rx/MAC_rx_ctrl.v"
19 add_file -verilog "../rtl/verilog/RMON/RMON_addr_gen.v"
20 add_file -verilog "../rtl/verilog/RMON/RMON_ctrl.v"
21 add_file -verilog "../rtl/verilog/RMON/RMON_dpram.v"
22 add_file -verilog "../rtl/verilog/MAC_rx/Broadcast_filter.v"
23 add_file -verilog "../rtl/verilog/RMON.v"
24 add_file -verilog "../rtl/verilog/MAC_rx.v"
25 add_file -verilog "../rtl/verilog/MAC_tx.v"
26 add_file -verilog "../rtl/verilog/miim/eth_clockgen.v"
27 add_file -verilog "../rtl/verilog/miim/eth_outputcontrol.v"
28 add_file -verilog "../rtl/verilog/miim/eth_shiftreg.v"
29 add_file -verilog "../rtl/verilog/miim/timescale.v"
30 add_file -verilog "../rtl/verilog/TECH/xilinx/duram.v"
31 add_file -verilog "../rtl/verilog/TECH/xilinx/CLK_SWITCH.v"
32 add_file -verilog "../rtl/verilog/TECH/xilinx/CLK_DIV2.v"
33 add_file -verilog "../rtl/verilog/eth_miim.v"
34 add_file -verilog "../rtl/verilog/Clk_ctrl.v"
35 add_file -verilog "../rtl/verilog/Phy_int.v"
36 add_file -verilog "../rtl/verilog/Reg_int.v"
37 add_file -verilog "../rtl/verilog/MAC_top.v"
40 #implementation: "syn"
44 set_option -technology VIRTEX4
45 set_option -part XC4VLX40
46 set_option -package FF668
47 set_option -speed_grade -10
49 #compilation/mapping options
50 set_option -default_enum_encoding onehot
51 set_option -symbolic_fsm_compiler 0
52 set_option -resource_sharing 1
53 set_option -use_fsm_explorer 0
54 set_option -top_module "MAC_top"
57 set_option -frequency auto
58 set_option -run_prop_extract 0
59 set_option -fanout_limit 10000
60 set_option -disable_io_insertion 0
62 set_option -update_models_cp 0
63 set_option -verification_mode 0
64 set_option -fixgatedclocks 0
66 set_option -retiming 0
67 set_option -no_sequential_opt 0
70 set_option -write_verilog 0
71 set_option -write_vhdl 0
74 set_option -write_vif 0
76 #automatic place and route (vendor) options
77 set_option -write_apr_constraint 0
79 #set result format/file last
80 project -result_file "./MAC_top.edf"
83 #implementation attributes
85 set_option -vlog_std v2001
87 set_option -project_relative_includes 1
90 set_option -job par_1 -add par
91 set_option -job par_1 -option run_backannotation 0