git.gag.com Git - debian/gnuradio/blob - usrp2/fpga/eth/rtl/verilog/elastic_buffer_tb.v

   1
   2 module elastic_buffer_tb;
   3
   4    reg        rx_clk = 0, tx_clk = 0, rst = 1;
   5
   6    reg [7:0]  rxd;
   7    wire [7:0] rxd_ret;
   8    reg        rx_dv, rx_er, crs, col;
   9    wire       rx_dv_ret, rx_er_ret, crs_ret, col_ret;
  10
  11    elastic_buffer elastic_buffer
  12      (.rx_clk(rx_clk),.tx_clk(tx_clk),.rst(rst),
  13       .rxd(rxd),.rx_dv(rx_dv),.rx_er(rx_er),.crs(crs),.col(col),
  14       .rxd_ret(rxd_ret),.rx_dv_ret(rx_dv_ret),.rx_er_ret(rx_er_ret),
  15       .crs_ret(crs_ret),.col_ret(col_ret) );
  16
  17    always #100 rx_clk = ~rx_clk;
  18    always #101 tx_clk = ~tx_clk;
  19    initial #950 rst = 0;
  20
  21    initial
  22      begin
  23         {col,crs,rx_er,rx_dv,rxd} <= 0;
  24         @(negedge rst);
  25         @(posedge rx_clk);
  26
  27         repeat (13)
  28           begin
  29              repeat (284)
  30                @(posedge rx_clk);
  31              SendPKT;
  32           end
  33         repeat (100)
  34           @(posedge rx_clk);
  35         $finish;
  36      end // initial begin
  37
  38    reg [7:0] rxd_ret_d1;
  39    always @(posedge tx_clk)
  40      rxd_ret_d1 <= rxd_ret;
  41
  42    wire [7:0] diff = rxd_ret_d1 - rxd_ret;
  43
  44    wire       error = rx_dv_ret && (diff != 8'hFF);
  45
  46    task SendPKT;
  47       begin
  48          {col,crs,rx_er,rx_dv,rxd} <= 0;
  49          @(posedge rx_clk);
  50          {col,crs,rx_er,rx_dv,rxd} <= {4'hF,8'd1};
  51          @(posedge rx_clk);
  52          repeat (250)
  53            begin
  54               rxd <= rxd + 1;
  55               @(posedge rx_clk);
  56            end
  57          {col,crs,rx_er,rx_dv,rxd} <= 0;
  58          @(posedge rx_clk);
  59       end
  60    endtask // SendPKT
  61
  62    initial begin
  63       $dumpfile("elastic_buffer_tb.vcd");
  64       $dumpvars(0,elastic_buffer_tb);
  65    end
  66 endmodule // elastic_buffer_tb