1 // Read from register 24 to confirm that Rx CRC check is enabled
\r
4 // Set speed to 1000 Mbps
\r
7 // Set MDIO clock (MDC) divider to 4 to speed up test
\r
11 // Check default (reset) values in new (added) MDIO registers
\r
12 //03 00 23 00 64 ff ff
\r
13 03 00 24 00 00 ff ff
\r
14 03 00 25 00 00 ff ff
\r
15 03 00 26 00 00 ff ff
\r
16 03 00 27 00 00 ff ff
\r
17 03 00 28 00 00 ff ff
\r
19 // Set RGAD=0x00 (all zeroes), FIAD=0x1f (all ones), check it
\r
20 // - these values allows easy recognition in the waveform
\r
22 03 00 25 00 1f ff ff
\r
24 // Now start the read operation by writing a 1 to the MIICOMMAND[1] - RSTAT
\r
26 03 00 24 00 02 ff ff
\r
28 // Delay for 768 NOP
\r
31 // Check that the read operation has completed
\r
32 03 00 28 00 00 ff ff
\r
34 // Set RGAD=0x1f (all ones), FIAD=0x00 (all zeroes), check it
\r
35 // - these values allows easy recognition in the waveform
\r
37 03 00 25 1f 00 ff ff
\r
38 // Set MIITX_DATA = 0xAAAA, check it
\r
40 03 00 26 AA AA ff ff
\r
41 // Check MIISTATUS - must still be zero
\r
42 03 00 28 00 00 ff ff
\r
44 // Now start the write operation by writing a 1 to the MIICOMMAND[2] - WCTRLDATA
\r
46 03 00 24 00 04 ff ff
\r
48 // Delay for 768 NOP
\r
51 // Check that the write operation has completed
\r
52 03 00 28 00 00 ff ff
\r