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reset synchronizer
[debian/gnuradio]
/
usrp2
/
fpga
/
control_lib
/
reset_sync.v
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module reset_sync
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(input clk,
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input reset_in,
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output reg reset_out);
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reg reset_int;
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always @(posedge clk or posedge reset_in)
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if(reset_in)
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{reset_out,reset_int} <= 2'b11;
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else
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{reset_out,reset_int} <= {reset_int,1'b0};
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endmodule // reset_sync