3 * Copyright 2007 Free Software Foundation, Inc.
5 * This program is free software: you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, either version 3 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include "memory_map.h"
22 #include "eth_phy.h" // for simulation constants
29 eth_mac_set_addr(const u2_mac_addr_t *src)
32 (((unsigned int)src->addr[0])<<8) +
33 ((unsigned int)src->addr[1]);
35 (((unsigned int)src->addr[2])<<24) +
36 (((unsigned int)src->addr[3])<<16) +
37 (((unsigned int)src->addr[4])<<8) +
38 (((unsigned int)src->addr[5]));
43 eth_mac_init(const u2_mac_addr_t *src)
45 eth_mac->miimoder = 25; // divider from CPU clock (50MHz/25 = 2MHz)
47 eth_mac_set_addr(src);
48 eth_mac->settings = MAC_SET_PAUSE_EN | MAC_SET_PASS_BCAST | MAC_SET_PASS_UCAST | MAC_SET_PAUSE_SEND_EN;
50 eth_mac->pause_time = 38;
51 eth_mac->pause_thresh = 1200;
53 // set rx flow control high and low water marks
54 // unsigned int lwmark = (2*2048 + 64)/4; // 2 * 2048-byte frames + 1 * 64-byte pause frame
55 // eth_mac->fc_hwmark = lwmark + 2048/4; // plus a 2048-byte frame
57 // eth_mac->fc_lwmark = 600; // there are currently 2047 lines in the fifo
58 // eth_mac->fc_hwmark = 1200;
59 //eth_mac->fc_padtime = 1700; // how long before flow control runs out do we
60 // request a re-pause. Units of 8ns (bytes)
62 //eth_mac->tx_pause_en = 0; // pay attn to pause frames sent to us
63 //eth_mac->pause_quanta_set = 38; // a bit more than 1 max frame 16kb/512 + fudge
64 //eth_mac->pause_frame_send_en = 0; // enable sending pause frames
68 eth_mac_read_rmon(int addr)
72 eth_mac->rmon_rd_addr = addr;
73 eth_mac->rmon_rd_apply = 1;
74 while(eth_mac->rmon_rd_grant == 0)
77 t = eth_mac->rmon_rd_dout;
78 eth_mac->rmon_rd_apply = 0;
84 eth_mac_miim_read(int addr)
86 if (hwconfig_simulation_p()){
89 return LANSR_MASTER | LANSR_LINK_GOOD | LANSR_SPEED_1000;
95 int phy_addr = PHY_ADDR;
96 eth_mac->miiaddress = ((addr & 0x1f) << 8) | phy_addr;
97 eth_mac->miicommand = MIIC_RSTAT;
99 while((eth_mac->miistatus & MIIS_BUSY) != 0)
102 int r = eth_mac->miirx_data;
103 //printf("MIIM-READ ADDR 0x%x DATA 0x%x\n",addr, r);
108 eth_mac_miim_write(int addr, int value)
110 int phy_addr = PHY_ADDR;
111 eth_mac->miiaddress = ((addr & 0x1f) << 8) | phy_addr;
112 eth_mac->miitx_data = value;
113 eth_mac->miicommand = MIIC_WCTRLDATA;
115 //printf("MIIM-WRITE ADDR 0x%x VAL 0x%x\n",addr,value);
116 while((eth_mac->miistatus & MIIS_BUSY) != 0)
121 eth_mac_miim_read_status(void)
123 if (hwconfig_simulation_p())
126 return eth_mac->miistatus;