3 * Copyright 2007 Free Software Foundation, Inc.
5 * This program is free software: you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, either version 3 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include "memory_map.h"
22 #include "eth_phy.h" // for simulation constants
29 eth_mac_set_addr(const u2_mac_addr_t *src)
32 eth_mac->ucast_hi = ((unsigned int)src->addr[0])<<8 + ((unsigned int)src->addr[1]);
33 eth_mac->ucast_lo = ((unsigned int)src->addr[2])<<24 + ((unsigned int)src->addr[3])<<16 +
34 ((unsigned int)src->addr[4])<<8 +((unsigned int)src->addr[5]);
37 // tell mac our source address and enable automatic insertion on Tx.
38 eth_mac->mac_tx_add_prom_wr = 0; // just in case
39 for (i = 0; i < 6; i++){
40 eth_mac->mac_tx_add_prom_add = i;
41 eth_mac->mac_tx_add_prom_data = src->addr[i];
42 eth_mac->mac_tx_add_prom_wr = 1;
44 eth_mac->mac_tx_add_prom_wr = 0;
47 eth_mac->mac_tx_add_en = 1; // overwrite pkt src addr field with this stuff
49 // set up receive destination address filter
50 eth_mac->mac_rx_add_prom_wr = 0; // just in case
51 for (i = 0; i < 6; i++){
52 eth_mac->mac_rx_add_prom_add = i;
53 eth_mac->mac_rx_add_prom_data = src->addr[i];
54 eth_mac->mac_rx_add_prom_wr = 1;
56 eth_mac->mac_rx_add_prom_wr = 0;
59 // eth_mac->mac_rx_add_chk_en = 1; // FIXME enable when everything's working
66 eth_mac_init(const u2_mac_addr_t *src)
68 eth_mac->miimoder = 25; // divider from CPU clock (50MHz/25 = 2MHz)
70 eth_mac_set_addr(src);
71 eth_mac->settings = 0x39;
72 // set rx flow control high and low water marks
73 // unsigned int lwmark = (2*2048 + 64)/4; // 2 * 2048-byte frames + 1 * 64-byte pause frame
74 // eth_mac->fc_hwmark = lwmark + 2048/4; // plus a 2048-byte frame
76 // eth_mac->fc_lwmark = 600; // there are currently 2047 lines in the fifo
77 // eth_mac->fc_hwmark = 1200;
78 //eth_mac->fc_padtime = 1700; // how long before flow control runs out do we
79 // request a re-pause. Units of 8ns (bytes)
81 //eth_mac->tx_pause_en = 0; // pay attn to pause frames sent to us
82 //eth_mac->pause_quanta_set = 38; // a bit more than 1 max frame 16kb/512 + fudge
83 //eth_mac->pause_frame_send_en = 0; // enable sending pause frames
87 eth_mac_read_rmon(int addr)
91 eth_mac->rmon_rd_addr = addr;
92 eth_mac->rmon_rd_apply = 1;
93 while(eth_mac->rmon_rd_grant == 0)
96 t = eth_mac->rmon_rd_dout;
97 eth_mac->rmon_rd_apply = 0;
103 eth_mac_miim_read(int addr)
105 if (hwconfig_simulation_p()){
108 return LANSR_MASTER | LANSR_LINK_GOOD | LANSR_SPEED_1000;
114 int phy_addr = PHY_ADDR;
115 eth_mac->miiaddress = ((addr & 0x1f) << 8) | phy_addr;
116 eth_mac->miicommand = MIIC_RSTAT;
118 while((eth_mac->miistatus & MIIS_BUSY) != 0)
121 printf("MIIM-READ ADDR %d DATA %d\n",addr, eth_mac->miirx_data);
122 return eth_mac->miirx_data;
126 eth_mac_miim_write(int addr, int value)
128 int phy_addr = PHY_ADDR;
129 eth_mac->miiaddress = ((addr & 0x1f) << 8) | phy_addr;
130 eth_mac->miitx_data = value;
131 eth_mac->miicommand = MIIC_WCTRLDATA;
133 printf("MIIM-WRITE ADDR %d VAL %d\n",addr,value);
134 while((eth_mac->miistatus & MIIS_BUSY) != 0)
139 eth_mac_miim_read_status(void)
141 if (hwconfig_simulation_p())
144 return eth_mac->miistatus;