2 * Copyright 2007 Free Software Foundation, Inc.
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 3 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 #include "memory_map.h"
26 #include "buffer_pool.h"
31 #include "usrp2_eth_packet.h"
32 #include "memcpy_wa.h"
34 #include "app_common_v2.h"
42 #define FW_SETS_SEQNO 1 // define to 0 or 1
45 static int fw_seqno; // used when f/w is filling in sequence numbers
49 * This program can respond to queries from the host
50 * and stream rx samples.
52 * Buffer 0 is used for rcvd frames from ethernet
53 * Buffer 1 is used by the cpu to send frames to the host.
54 * Buffers 2 and 3 are used to double-buffer the DSP Rx to eth flow
56 #define CPU_RX_BUF 0 // eth -> cpu
57 //#define CPU_TX_BUF 1 // cpu -> eth
58 #define DSP_RX_BUF_0 2 // dsp rx -> eth (double buffer)
59 #define DSP_RX_BUF_1 3 // dsp rx -> eth
62 // variables for streaming mode
64 static bool streaming_p = false;
65 static int streaming_frame_count = 0;
66 #define FRAMES_PER_CMD 1000
70 * ================================================================
71 * configure DSP RX double buffering state machine
72 * ================================================================
75 // 4 lines of ethernet hdr + 1 line transport hdr + 1 line (word0)
76 // DSP Rx writes timestamp followed by nlines_per_frame of samples
77 #define DSP_RX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4 + 1)
80 buf_cmd_args_t dsp_rx_recv_args = {
87 buf_cmd_args_t dsp_rx_send_args = {
89 0, // starts with ethernet header in line 0
90 0, // filled in from list_line register
93 dbsm_t dsp_rx_sm; // the state machine
95 // ----------------------------------------------------------------
99 // The mac address of the host we're sending to.
100 u2_mac_addr_t host_mac_addr;
103 void link_changed_callback(int speed);
106 start_rx_streaming_cmd(const u2_mac_addr_t *host, op_start_rx_streaming_t *p)
108 host_mac_addr = *host; // remember who we're sending to
111 * Construct ethernet header and word0 and preload into two buffers
114 memset(&pkt, 0, sizeof(pkt));
115 pkt.ehdr.dst = *host;
116 pkt.ehdr.ethertype = U2_ETHERTYPE;
117 u2p_set_word0(&pkt.fixed, 0, 0);
118 // DSP RX will fill in timestamp
120 memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt));
121 memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt));
128 dsp_rx_regs->clear_state = 1; // reset
130 if (1){ // we're streaming
132 streaming_frame_count = FRAMES_PER_CMD;
133 dsp_rx_regs->rx_command =
134 MK_RX_CMD(FRAMES_PER_CMD * p->items_per_frame, p->items_per_frame,
135 1, 1); // set "chain" bit
137 // kick off the state machine
138 dbsm_start(&dsp_rx_sm);
139 dsp_rx_regs->rx_time = 0; // enqueue first of two commands
141 // make sure this one and the rest have the "now" and "chain" bits set.
142 dsp_rx_regs->rx_command =
143 MK_RX_CMD(FRAMES_PER_CMD * p->items_per_frame, p->items_per_frame,
145 dsp_rx_regs->rx_time = 0; // enqueue second command
150 dsp_rx_regs->rx_command =
151 MK_RX_CMD(p->total_samples, p->items_per_frame, p->rx_now, 0);
153 // kick off the state machine
154 dbsm_start(&dsp_rx_sm);
155 dsp_rx_regs->rx_time = p->rx_time;
165 dsp_rx_regs->clear_state = 1; // flush cmd queue
166 bp_clear_buf(DSP_RX_BUF_0);
167 bp_clear_buf(DSP_RX_BUF_1);
171 buffer_irq_handler(unsigned irq)
173 uint32_t status = buffer_pool_status->status;
175 if (status & BPS_DONE(CPU_RX_BUF)){ // we've rcvd a frame from ethernet
176 bp_clear_buf(CPU_RX_BUF);
177 eth_pkt_inspector(0, CPU_RX_BUF);
178 bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
180 if (status & BPS_ERROR(CPU_RX_BUF)){ // error from ethernet
181 bp_clear_buf(CPU_RX_BUF);
182 bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
185 dbsm_process_status(&dsp_rx_sm, status);
187 if (status & BPS_DONE(CPU_TX_BUF)){
188 bp_clear_buf(CPU_TX_BUF);
194 * Debugging ONLY. This will be handled by the tx_protocol_engine.
196 * This is called when the DSP Rx chain has filled in a packet.
197 * We set and increment the seqno, then return false, indicating
198 * that we didn't handle the packet. A bit of a kludge
199 * but it should work.
202 fw_sets_seqno_inspector(dbsm_t *sm, int buf_this) // returns false
204 uint32_t *p = buffer_ram(buf_this);
205 uint32_t seqno = fw_seqno++;
207 // KLUDGE all kinds of nasty magic numbers and embedded knowledge
209 t = (t & 0xffff00ff) | ((seqno & 0xff) << 8);
212 // queue up another rx command when required
213 if (streaming_p && --streaming_frame_count == 0){
214 streaming_frame_count = FRAMES_PER_CMD;
215 dsp_rx_regs->rx_time = 0;
218 return false; // we didn't handle the packet
228 putstr("\nrx_only_v2\n");
230 ethernet_register_link_changed_callback(link_changed_callback);
233 // initialize double buffering state machine for DSP RX -> Ethernet
236 dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
237 &dsp_rx_recv_args, &dsp_rx_send_args,
238 fw_sets_seqno_inspector);
241 dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
242 &dsp_rx_recv_args, &dsp_rx_send_args,
246 // setup receive from ETH
247 bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
251 buffer_irq_handler(0);
253 int pending = pic_regs->pending; // poll for under or overrun
255 if (pending & PIC_OVERRUN_INT){
256 dbsm_handle_rx_overrun(&dsp_rx_sm);
257 pic_regs->pending = PIC_OVERRUN_INT; // clear pending interrupt