2 * Copyright 2007 Free Software Foundation, Inc.
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 3 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "memory_map.h"
25 #include "buffer_pool.h"
30 #include "usrp2_eth_packet.h"
31 #include "memcpy_wa.h"
36 // ----------------------------------------------------------------
38 static u2_mac_addr_t dst_mac_addr =
39 {{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }};
42 // ----------------------------------------------------------------
44 #define PACKET_SIZE 1500 // bytes
45 #define ETH_DATA_RATE 1000000 // 1MB/s
46 #define ETH_PACKET_RATE (ETH_DATA_RATE/PACKET_SIZE) // 13,3333 pkts/s
48 #define TIMER_RATE 100000000 // 100 MHz clock
50 static int timer_delta = TIMER_RATE/ETH_PACKET_RATE; // ticks between interrupts
52 static volatile bool send_packet_now = false; // timer handler sets this
53 static volatile bool link_is_up = false; // eth handler sets this
55 int packet_number = 0;
57 // ----------------------------------------------------------------
59 // debugging output on tx pins
60 #define LS_MASK 0xE0000
61 #define LS_1000 0x80000
62 #define LS_100 0x40000
67 * Called when eth phy state changes (w/ interrupts disabled)
70 link_changed_callback(int speed)
95 //hal_gpio_set_tx(v, LS_MASK); /* set debug bits on d'board */
97 putstr("\neth link changed: speed = ");
102 timer_irq_handler(unsigned irq)
104 hal_set_timeout(timer_delta); // schedule next timeout
110 buffer_irq_handler(unsigned irq)
116 init_packet(int *buf, const u2_eth_packet_t *pkt, int bufnum)
119 int mark = ((bufnum & 0xff) << 24) | 0x005A0000;
121 for (i = 0; i < BP_NLINES; i++){
126 // copy header into buffer
127 memcpy_wa(buf, pkt, sizeof(*pkt));
135 u2_eth_packet_t pkt __attribute__((aligned (4)));
137 pkt.ehdr.dst = dst_mac_addr;
138 // src filled in by mac
139 pkt.ehdr.ethertype = U2_ETHERTYPE;
141 // fill ALL buffers for debugging
142 for (i = 0; i < 8; i++)
143 init_packet((void *)buffer_ram(i), &pkt, i);
153 output_regs->leds = 0x00;
155 int peak_hold_count = 0;
157 // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
158 //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
159 //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
161 putstr("\nrcv_eth_packets\n");
165 // pic_register_handler(IRQ_BUFFER, buffer_irq_handler); // poll for now
167 // FIXME turn off timer since I don't think MTS and MFS instructions are implemented
168 // pic_register_handler(IRQ_TIMER, timer_irq_handler);
169 // hal_set_timeout(timer_delta);
171 ethernet_register_link_changed_callback(link_changed_callback);
175 //eth_mac->speed = 4; // FIXME hardcode mac speed to 1000
177 // kick off a receive
178 bp_receive_to_buf(2, PORT_ETH, 1, 0, 511);
181 // u2_eth_packet_t pkt;
187 if ((buffer_pool_status->status & (BPS_DONE_2|BPS_ERROR_2)) != 0){
188 // we've got a packet!
191 // copy to stack buffer so we can byte address it
192 memcpy_wa(&pkt, (void *)buffer_ram(2), sizeof(pkt));
195 print_mac_addr(pkt.ehdr.dst_addr);
197 print_mac_addr(pkt.ehdr.src_addr);
198 putstr(" ethtype: ");
199 puthex16(pkt.ehdr.ethertype);
201 int len = (buffer_pool_status->last_line[2] + 1) * 4;
204 volatile int *bp = buffer_ram(2);
206 for (i = 0; i < 16; i++){
213 // kick off next receive
215 bp_receive_to_buf(2, PORT_ETH, 1, 0, 511);
217 peak_hold_count = 2048 * 10;
220 if (peak_hold_count > 0){
225 if (new_leds != prev_leds){
226 prev_leds = new_leds;
227 output_regs->leds = new_leds;